Electrical & Computer Engineering     |     Carnegie Mellon

Wednesday, March 19, 12:00-1:00 p.m. HH-1112


Masahiro Fujita
University of Tokyo

System Level Design Methodology for System LSI with SpecC

It is essential to support very early design stages for system LSI and SoC type designs. We need a consistent and total design methodology that can deal with software as well as hardware of system LSI designs. There are several C-language based "system level" specification and design languages proposed recently, such as SystemC, SpecC, and SystemVerilog. In this talk, we first briefly summarize ideas on SpecC language and its associated design methodology that can totally support system LSI design process from specification down to RTL. Then we present our research activities on synthesis and verification of system level design descriptions. We are studying on special architecture for easy-debuggability and its associated synthesis methods including custom instruction set generation and optimum code generation for the architecture. We also briefly discuss our verification techniques targeting synchronization mechanisms in system level concurrent processes.

Masahiro Fujita received his Ph.D. degree in Engineering from the University of Tokyo in 1985 and then joined Fujitsu Laboratories Ltd. From 1993 to 2000, he had been assigned to Fujitsu's US research office and directed the CAD research group. In March 2000, he joined the department of Electronic Engineering in the University of Tokyo as a professor. He has written over 100 technical papers on all aspects of logic design CAD. He has received several awards from Japanese major scientific societies on his works in formal verification and logic synthesis. His doctor degree thesis was written in early 80's and on model checking. Since then he has been involved in many research projects on various aspects of formal verification as well as logic/system synthesis.