Electrical & Computer Engineering     |     Carnegie Mellon

Tuesday, August 6, 12:00-1:00 p.m. HH-1112

Kenneth S. Stevens
Air Force Institute of Technology (AFIT)

Asynchronous Circuit Anarchy: Does it Make Sense?

This presentation will touch on the potential application of asynchronous circuits in our currently clocked design world. Three aspects of design - architecture, circuits, and communications - will be briefly discussed. Recent research on asynchronous circuits in Intel was carried out as part of a project to study the potential of asynchronous circuits as an alternative if global chip clocking becomes unfeasible. The test chip developed as part of this project will be used as the springboard for this presentation. This circuit contained much of the front end of Intel's microprocessors and was fabricated on the same processors as a commercial product. The test chip showed a 3X improvement in throughput, and a 2X improvement in latency and power. The means of achieving these improvements will be discussed. Examples of asynchronous design in Intel's current microprocessors will be presented, and some projections as to important future uses will be made.
Kenneth S. Stevens received a B.A. in Biology and a B.S. in Computer Science in 1982, and a M.S. in Computer Science in 1984 from the University of Utah. He received his Ph.D. in Computer Science from the University of Calgary, Alberta, Canada, in 1994. From 1984 through 1991 he held research positions at the Fairchild/Schlumberger Laboratory for AI Research, the Schlumberger Palo Alto Research Laboratory, and Hewlett Packard Laboratories in Palo Alto CA. Dr. Stevens became an Assistant Professor at the Air Force Institute of Technology (AFIT) in Dayton, OH in 1994, and since 1996 he has been an Adjunct Professor. Since 1996 he has been employed at Intel's Strategic CAD Labs in Hillsboro, OR. He was the principal author of three papers that received the Best Paper awards for communication chip architecture, circuit design, and timing analysis. He holds seven patents in the area of communications chip design, circuit design, and timing analysis. He is a Senior Member of IEEE. Ken has fabricated several large fully asynchronous VLSI chips, and has developed public domain software for the international spell checker "ispell." He is also been the co-founder of a successful small software company. His research interests include asynchronous circuits, VLSI, architecture and design, hardware synthesis and verification, and timing analysis.