Electrical & Computer Engineering     |     Carnegie Mellon

Tuesday, February 26, 12:00-1:00 p.m. HH-1112

Michael P. Flynn
University of Michigan

Digital Calibration of Flash Analog to Digital Converters

As scaling continues and as supply voltages continue to drop, many traditional analog circuit design techniques no longer work readily. However, the Flash ADC technique which dates to the 1940s, works well in fine line CMOS processes. A new digital calibration technique which utilizes analog redundancy is described. With this scheme very large comparator offsets are tolerated allowing the analog circuits to be small, fast and power efficient.

Michael P. Flynn was born in Cork, Ireland. He received the B.E. and M.Eng.Sc degrees from the National University of Ireland at Cork (UCC), in 1988 and 1990 respectively. He received the Ph.D. degree from Carnegie Mellon University in 1995. From 1998 to 1991, he was with the National Microelectronics Research Centre, Cork. He was with National Semiconductor in Santa Clara, CA, from 1993 to 1995. From 1995 to 1997 he was a Member of Technical Staff with Texas Instruments, DSP R&D lab, Dallas, TX. During the four year period form 1997 to 2001, he was with Parthus Technologies, Cork, where he held the position of Technical Director. During that period, he was also a part-time Lecturer at the Department of Microelectronics at the National University of Ireland, Cork. Dr. Flynn joined the Dept. of EE and CS at the University of Michigan, Ann Arbor in 2001. Dr. Flynn received the 1992-93 IEEE Solid-State Circuits Predoctoral Fellowship. He is a Senior Member of the IEEE, and a member of Sigma Xi.