Electrical & Computer Engineering     |     Carnegie Mellon

Wednesday, September 18, 12:30-1:30 p.m. HH-1112

Shawn Blanton
Carnegie Mellon University

Test and Diagnosis of IC Failures

For over 40 years, the semiconductor industry has represented defects within an IC using the single stuck-line (SSL) fault model---a model whose roots can be traced back to defective vacuum tubes. Although it is well known that defects do not cause wires to be stuck at logic-0 or logic-1, the SSL fault model has and continues to be effective. However, it is possible for a defect to escape detection by stuck-line testing procedures. Moreover, the likelihood of defect escape is increasing due to the complexities introduced by newer technologies. As a result, researchers have and continue to develop models that more precisely reflect the properties of real defects. Examples include the bridging fault model for shorts between interconnect lines, the transition fault model for gates and lines with unexpected slew rates, and the open fault model for broken interconnect. The advantages of these and other fault models are clear, however there is one subtle but important disadvantage: Test procedures, methodologies, and CAD tools for a given fault model typically cannot be used for another fault model. This makes the development of a test procedure for all or a select subset of fault models difficult, inefficient and costly. To address this problem, we have been working for several years on something we call the fault tuple. The fault tuple is not a new fault model but a mechanism for modeling any defect at the logical level. We have developed various fault tuple based CAD tools that enable efficient and cost-effective development of test procedures for a variety of fault types. One aspect of our work focuses on the use of fault tuples for failure diagnosis. In diagnosis, one is interested in identifying the location of the defect, characterizing the defect's impact on circuit behavior and, if possible, the cause of the defect. In this talk, I will describe our initial work in this area and show its potential over existing approaches through a case study involving a specific category of polysilicon spot defects.

Shawn Blanton is an associate professor in the Department of Electrical and Computer Engineering at Carnegie Mellon University where he is the Associate Director of the Center for Silicon System Design. He received the Bachelor's degree in engineering from Calvin College in 1987, a Master's degree in Electrical Engineering in 1989 from the University of Arizona, and a Ph.D. degree in Computer Science and Engineering from the University of Michigan, Ann Arbor in 1995. He has worked on the design and test of complex digital systems with General Motors Research Laboratories, AT&T Bell Laboratories, Intel, and Motorola. Dr. Blanton is the recipient of National Science Foundation Career Award and is a member of IEEE and ACM.