| January |
| 22 |
Rahul Kundu |
ECE Ph.D. student |
Functional
Analysis of Crosstalk Switch Failures in Domino Logic Circuits |
| 31 |
Jiangfeng Wu |
ECE Ph.D. student |
A Low-Noise
Low-Offset Chopper Stabilized Capacitive Readout Amplifier for CMOS
MEMS Accelerometer |
| February |
| 5 |
Herman Schmit |
Carnegie Mellon University |
Programmable
Interconnect Fabrics |
| 12 |
Anoop Iyer |
ECE M.S. student |
Microarchitecture
Level Power Management |
| 19 |
Noppanunt Utamaphethai |
ECE Ph.D. student |
Simulation-based
Microarchitecture Verification |
| 26 |
Michael P. Flynn |
University of Michigan |
Digital
Calibration of Flash Analog to Digital Converters |
| March |
| 5 |
Jin Yang / Amit Goel |
Intel / ECE Ph.D. student |
Generalized
Symbolic Trajectory Evaluation: Essence and a Case Study |
| 12 |
Ray Holt |
Internet Marketing |
Microprocessing
Design and Development for the US Navy F14 Fighter Jet |
| 19 |
Sitaraman Iyer |
ECE Ph.D. student |
Modeling
and Simulation of a CMOS-MEMS Gyroscope |
| 21 |
Krishnamurthy Soumyanath |
Intel Corp. |
Challenges
and Opportunities for Mixed Signal Systems in Sub 100nM CMOS Technologies |
| 26 |
Matt Moe |
ECE Ph.D. student |
Floorplanning
for Pipelined Arrays using Sequence Pairs |
| April |
| 9 |
Rishiyur S. Nikhil |
Sandburst Corporation |
Bluespec™:
a language to revolutionize ASIC design flow |
| 16 |
David Whelihan |
ECE Ph.D. student |
Packet
Switched Interconnection Networks for SOC |
| 23 |
Art Davidson |
Carnegie Mellon University |
The
Wright Brothers: Lessons for Engineers and Entrepreneurs |
| May |
| 7 |
Ben Levine |
ECE Ph.D. student |
Queue
Machines: Hardware and Software to Enable Integration of Processors
and Reconfigurable Fabrics |
| 14 |
Peter Feldmann |
IBM |
Communcation
System Performance Analysis by Efficient Computations with Markov
Chains |
| 28 |
Girish Varatkar |
ECE Ph.D. student |
Modeling
and Synthesis of On-Chip Multimedia Traffic |
| July |
| 23 |
Vincent J. Mooney III |
Assistant Professor,
Georgia Institute of Technology |
Dynamic
Memory Management Unit in Hardware and a Framework for Automatic
Generation of Configuratin Files for a Custom Software/Hardware RTOS
for SoC |
| August |
| 6 |
Kenneth S. Stevens |
Adjunct Professor, Air Force Institute of Technology (AFIT) |
Asynchronous
Circuit Anarchy: Does it Make Sense?
|
| 7 |
Oded Maler |
Senior Researcher ("Directeur de Recherche"),
CNRS |
Combining
Formal Verification and Timing Analysis of Digital Circuits
10:30 AM |
| September |
| 11 |
Larry Pileggi |
Carnegie Mellon University |
Constructive
Fabrics |
| 18 |
Shawn Blanton |
Carnegie Mellon University |
Test
and Diagnosis of IC Failures
12:30 PM |
| 25 |
Diana Marculescu |
Carnegie Mellon University |
Energy
Aware Computing: Synchronous vs. Partially Asynchronous Processor
12:30 PM |
| October |
| 4 |
Subhasish Mitra |
Intel Corp. / Stanford University |
Dependable
Reconfigurable Computing Design Diversity and Self Repair |
| 9 |
Thomas Zanon |
ECE Ph.D. student |
Evidence
of Layout-Dependent Failure Mechanisms in SRAMs
12:30 PM |
| 16 |
Andrzej Strojwas |
Carnegie Mellon University |
Design-Manufacturing
Interface for VDSM Technologies
12:30 PM |
| 23 |
Steve Haynal |
Intel |
Automata-Based
Symbolic Scheduling
12:30 PM |
| 30 |
Ruchir Puri |
IBM |
High-Performance
Circuit Synthesis and Technology Issues
12:30 PM |
| November |
| 4 |
Randal E. Bryant |
Carnegie Mellon University |
Symbolic
Simulation and its Connection to Formal Verification
12:30 PM |
| 20 |
Jingcao Hu |
ECE Ph.D. student |
Energy-Aware
On-chip Communication: Challenges and Opportunities
12:30 PM |
| December |
| 11 |
Radu Marculescu |
Carnegie Mellon University |
COATNET:
COlloidAl computing for Textile-area NETworks
12:30 PM |