Electrical & Computer Engineering     |     Carnegie Mellon
     

Wednesday, December 5, 12:00-1:00 p.m. HH-1112

Shipra Panda
Carnegie Mellon University

Simulation Coverage Analysis Using Trajectory Evaluation

One of the most difficult problems facing designers today is making sure that their designs are bug-free. Simulation is the primary method of functional design verification, however finding good simulation coverage metrics is still an open problem. Exhaustive simulation is prohibitively time consuming and the resulting limited test coverage leads to undetected bugs. An alternative to simulation is formal verification which attempts to prove or disprove properties of a design, therefore it can give a definitive answer about the correctness of a circuit, but since these methods are so rigorous, they are too computationally expensive and therefore only small designs can be verified. As modern designs are becoming more and more complex, closing the gaps in simulation coverage is becoming an important issue. In this talk I will discuss our new technique which arose as a compromise between the thoroughness of formal verification and the ability of simulation to validate complex designs. Most coverage analysis techniques are based on variations of code coverage. Our proposed coverage metric is based on specification coverage. Our method borrows ideas from Symbolic Trajectory Evaluation (STE) to generate a trajectory (control) graph of interactions within an interface circuit. The trajectory graph also contains expected circuit responses. Simulation is run and the output patterns are saved. The simulation results are then mapped against the trajectory graph and coverage of the trajectory graph is reported. Because we are looking at the results of functional testing we can check if the simulation output matches the expected circuit responses and report errors.


Bio
Shipra Panda received her BS in 1991 and MS in 1995 in Electrical and Computer Engineering from the University of Colorado at Boulder. Between 1991 and 1993, she worked on the system simulation of ASICs at Storage Technology Corp. in Boulder, CO. In 1995 she began work on the Ph.D. degree in Electrical and Computer Engineering at Carnegie Mellon University.