Electrical & Computer Engineering     |     Carnegie Mellon

Tuesday, May 8, 12:00-1:00 p.m. HH-1112

John T. Chen
Carnegie Mellon University

Enabling Embedded Memory Diagnosis via Test Response Compression

Diagnosis of failing memories has long been used for manufacturing feedback and laser repair. In the last few years, we have seen a surge of embedded RAMs in often very pin-limited designs. Those embedded RAMs are typically tested by BIST that produces only a Pass/Fail signal to reduce pin overhead at the cost of diagnosability. This talk introduces a method that enables diagnosis of BISTed memories by reducing the pin-overhead via compression of test responses. This method has been tested by simulation with various memory specifications, fail patterns and test algorithms. This method has also been tested by hardware implementation in 0.18m process along with SRAMs and BIST circuit.

John T. Chen received the B.S. and M.S.E.E degrees in Electrical and Computer Engineering from the Carnegie Mellon University in 1996 and 1998. In 1998, he began work on the Ph.D. degree in Electrical Engineering at Carnegie Mellon University.