Electrical & Computer Engineering     |     Carnegie Mellon

CSSI Seminar Archives: 2001

  Speaker Company / Institution Title
January
16 Se-Hyun Yang ECE Ph.D. student An Integrated Approach to Reducing Leakage in DSM I-Caches
25

Larry Pileggi

 Carnegie Mellon University The Center for Silicon System Implementation (CSSI)
29
 Padmini Gopalakrishnan Monterey Design Systems Wireload Models - The Curse of Top-down Design
30 Rajeev Jayaraman Xilinx Inc. FPGAs: Revolutionizing Digital System Design
February
6

Clay McDonald

NOTE: 4 - 5 pm

 ECE Ph.D. student Symbolic Functional and Timing Verification of Transistor-Level Circuits
13

Miroslav Velev

NOTE: 4 - 5 PM

 ECE Ph.D. student Formal Verification of VLIW Microprocessors with Speculative Execution
20
 Phil Nigh IBM Shipping High-Quality ICs in the Future of GHz, Nanometers, Amps, Watts and Miles of Copper
27

Vishwani D. Agrawal

NOTE: 12:30 - 1:30 PM

 Bell Labs Digital Circuit Design for Minimum Transient Energy
March
6
 Ramesh Harjani University of Minnesota CMOS Analog Circuits for Wireless Communications
7
 Jack Kenney Analog Devices, Inc. A 4 Channel Analog Front End for ADSL Modems
13
 Herve R. Auch-Roy Oki Semiconductor A Platform for System-Level Integration
15
 David Harame IBM, Essex Junction, VT Status and Trends in SiGE BiCMOS Technology
 27       SPRING BREAK
April
3
 William E. Dougherty ECE Ph.D. student The Behavioral Synthesis Coma: Pull the Plug or Wait and See?
10
 Tom Dillinger Sun Microsystems Top Ten CAD Challenges for Deep Sub-Micron Custom Design
17
 Robert Aslett Intel Important Design and CAD Technology Trends at Intel
24

Daniel L. Rosewater

NOTE: 12:30 - 1:30 PM

 CS Ph.D. student Practical NanoComputing: Overcoming Fundamental Obstacles
30

Sharad Malik

NOTE: 4:30 - 5:30 PM

 Princeton University Fully Programmable Systems: The Future of Application Specific Systems
May
3
 Michael W. Beattie Carnegie Mellon University Inductance Modeling and Extraction
8
 John T. Chen ECE Ph.D. student Enabling Embedded Memory Diagnosis via Test Response Compression
10
 Dr. Ken Kundert Cadence Design Systems Noise in Mixers, Oscillators, Samplers & Logic: An Introduction to Cyclostationary Noise
15
 Dr. Sorin Cotofana Delft University of Technology (TU Delft) FPGA Augmented TriMedia: A Case Study
22
 Prakash Gopalakrishnan ECE Ph.D. student Layout from Logic: Standard Cells Or Transistors?
29
 David Guillou ECE Ph.D. student Control of MEMS Electrostatic Parallel-Plate Actuators
July
31 Vincent John Mooney III Georgia Institute of Technology

Hardware/Software Co-Design of a Real-Time Operating System for System-on-a-Chip
September
20 Wojciech Maly Carnegie Mellon University

IC Design in High-Cost Nanometer-Technologies Era
26 Hasnain Lakdawala ECE Ph.D. student

CMOS Micromachining: Design, Interface and Temperature Control
October
10 Rob Rutenbar Carnegie Mellon University

Synthesis for Industrial-Scale Analog Intellectual Property
17 Larry Pileggi Carnegie Mellon University

Standard Cells May Not Be Quite So Standard Soon
24 Kumar N. Dwarakanath ECE Ph.D. student

Test Analysis Using Fault Tuples
November
2 TM Mak Intel

Challenges of Structual Based Delay Test
14 James Stansberry, Dave Landis, Dr. Herman Schmit, Dr. Marvin Mickle Sony/PDG/CMU/UPitt

Chip Design in Pittsburgh
19 Aneesh Koorapaty ECE Ph.D. student

Adaptable, Fabric-Specific Design Flows for Fabric Exploration
28 Peng Li ECE Ph.D. student

Linear-Centric Modeling for Harmonic Balance Simulation and Distortion Analysis
December
5 Shipra Panda ECE Ph.D. student

Simulation Coverage Analysis Using Trajectory Evaluation