| January |
| 15 |
Umit Y. Ogras |
Carnegie Mellon University |
Modeling,
Analysis and Optimization of Networks-on-Chip Communication Architectures |
| 22 |
Shawn Blanton |
Carnegie Mellon University |
CSSI
Student Town Hall Meeting |
| 29 |
Yen-Tzu Lin |
Carnegie Mellon University |
Physically-Aware
N-Detect Test Pattern Selection |
| February |
| 12 |
Jon Proesel
|
Carnegie Mellon University |
Flash
and Pipeline ADC Designs for Nanoscale Digital CMOS |
| 19 |
Valeria Bertacco |
Carnegie Mellon University |
Towards
Correctness-Constrained Execution for Processor Designs |
| 26 |
Vikram Iyengar |
IBM |
At-Speed
Structural Test of ASICs |
| March |
| 04 |
Roland Wunderlich |
Carnegie Mellon University |
Super-resolution
Performance Trace Reconstruction from CPU Performance Counters |
| 18 |
Michael Orshansky |
The University of Texas at Austin |
Towards
Statistical Design of Digital ICs |
| April |
| 08 |
Mark McCartney |
Carnegie Mellon University |
Variability-tolerant
SRAM Read Path Timing in Deeply Scaled Processes |
| 15 |
Kai-Chiang Wu |
Carnegie Mellon University |
Circuit Optimization Techniques for Radiation-Induced Soft Errors |
| May |
| 06 |
Jinyin Zhang |
Carnegie Mellon University |
A Doubly Regularized Support Vector Machine for Automatic Channel Selection of Brain Computer Interface |
| 13 |
C. Fred Higgs III |
Carnegie Mellon University |
A 3D CMP-aware Nanoscale IC Design Methodology using Physics-based Modeling |