CSSI Faculty

Jeyanandh Paramesh, PhD

Jeyanandh Paramesh, PhD

ECE Directory | Personal

Research Areas:

Circuits, Emerging

Representative Publications

• J. Paramesh, R. Bishop, K. Soumyanath and D.J. Allstot, “A four-antenna receiver in 90nm CMOS for beamforming and spatial diversity,” /IEEE J. Solid-State Circuits, /vol. 40, pp. 2515-2524, Dec. 2005.

•M. Elmala, J. Paramesh and K. Soumyanath, "A 90nm Doherty power amplifier in 90nm CMOS with minimum AM-PM distortion," /IEEE J. Solid-State Circuits, /vol. 41, pp. 1323-1332, Jun. 2006.

•Y. Tang, S. Gupta, K. Chang, J. Paramesh and D. J. Allstot, "A Cascaded Complex ADC with Digital I/Q Mismatch Calibration," /IEEE Transactions on Circuits and Systems I: Regular Papers.

• J. Paramesh, R. Bishop, K. Soumyanath and D. J. Allstot, “A 1.4V 11b 330MHz S-D ADC for next-generation WLAN,” /Digest of Technical Papers, IEEE VLSI Circuits Symposium pp. 196-197, 2006.

•D. Ozis, J. Paramesh and D. J. Allstot, "A CMOS 5GHz image-reject receiver front-end architecture," IEEE Radio-frequency Integrated Circuits Symposium (RFIC), pp 321-324, 2007.