• P. A. Milder, F. Franchetti, J. C. Hoe, Markus Pueschel, "Formal Datapath Representation and Manipulation for Implementing DSP Transforms." Proc. ACM/IEEE Design Automation Conference (DAC), June 2008.
•E. S. Chung, E. Nurvitadhi, J. C. Hoe, B. Falsafi and K. Mai, "A Complexity-Effective Architecture for Accelerating Full-System Multiprocessor Simulations Using FPGAs." Proc. ACM International Symposium on Field Programmable Gate Arrays (FPGA), February 2008.
•J. C. Smolens, B. T. Gold, B. Falsafi, and J. C. Hoe, "Reunion: Complexity-Effective Multicore Redundancy," Proc. ACM/IEEE International Symposium on Microarchitecture (MICRO), pp 223-234, December 2006.
• R. E. Wunderlich, T. F. Wenisch, B. Falsafi, J. C. Hoe, "SMARTS: Accelerating Microarchitecture Simulation via Rigorous Statistical Sampling," ACM Transactions on Modeling and Computer Simulation, Volume 16, Number 3, pp 197-224, June 2006.
•J. C. Hoe and Arvind, "Operation-Centric Hardware Description and Synthesis," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 23, Issue 9, pp 1277-1288, September 2004.