The Patterned Ground Shield A Single-Chip GPS Receiver in 0.5um CMOS An On-Chip Inductor Suspended on Polyimide Membrane The First Single-Chip 802.11a Transceiver A 5.2-GHz T/R Switch in 0.18um CMOS A 10-GHz Standing-Wave Clock Network
Click on the chip photos above for representative publications.


Book Chapters

  • T.H. Lee, M.M. Hershenson, S.S. Mohan, H. Samavati, and C.P. Yue, "RF Passive IC Components," in The VLSI Handbook, Edited by Wai-Kai Chen, CRC Press and IEEE Press, New York, 1999.


    Journal Articles

    High Frequency / RF IC's
  • F. O'Mahony, C.P. Yue, M.A. Horowitz, S.S. Wong, "A 10-GHz Global Clock Distribution Using Coupled Standing-Wave Oscillators," IEEE Journal of Solid-State Circuits, vol. 38, no. 11, pp. 1813-1820, November 2003.
  • R.T. Chang, N. Talwalkar, C.P. Yue, S.S. Wong, "Near Speed-of-Light Signaling Over On-Chip Electrical Interconnects," IEEE Journal of Solid-State Circuits, vol. 38, no. 5, pp. 834-838, May 2003.
  • M. Zargari, D. Su, C.P. Yue, S. Rabii, D. Weber, B. Kaczynski, S. Mehta, K. Singh, S. Mendis, and B. Wooley, "A 5-GHz CMOS Transceiver for IEEE 802.11a Wireless LAN," IEEE Journal of Solid-State Circuits, vol. 37, no. 12, pp. 1688-1694, December 2002.
  • D.K. Shaeffer, A.R. Shahani, S.S. Mohan, H. Samavati, H. Rategh, M.M. Hershenson, M. Xu, C.P. Yue, D. Eddleman, and T.H. Lee, "A 115-mW, 0.5-mm CMOS GPS Receiver with Wide Dynamic-Range Active Filters," IEEE Journal of Solid-State Circuits, vol. 33, no. 12, pp. 2219-2231, December 1998.
  • A.R. Shahani, D.K. Shaeffer, S.S. Mohan, H. Samavati, H. Rategh, M.M. Hershenson, M. Xu, C.P. Yue, D. Eddleman, and T.H. Lee, "Low-Power Dividerless Frequency Synthesis Using Aperture Phase Detection," IEEE Journal of Solid-State Circuits, vol. 33, no. 12, pp. 2232-2239, December 1998.

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    Device & Package Modeling
  • X. Qi, C.P. Yue, T. Arnborg, H.T.Soh, H. Sakai, Z. Yu, R.W. Dutton, "A fast 3D Modeling Approach to Electrical Parameters Extraction of Bonding Wires for RF Circuits," IEEE Transactions on Components, Packaging and Manufacturing Technology, Part B: Advanced Packaging, vol. 23, pp. 480-488, August 2000.
  • C.P. Yue and S.S. Wong, "Physical Modeling of Spiral Inductors on Silicon," IEEE Transactions of Electron Devices, vol. 47, no. 3, pp. 560-568, March 2000.
  • C.P. Yue and S.S. Wong, "On-Chip Spiral Inductors with Patterned Ground Shields for Si-Based RF IC's," IEEE Journal of Solid-State Circuits, vol. 33, no. 5, pp. 743-752, May 1998.
  • C.P. Yue, V.M. Agostinelli, G.M. Yeric, A.F. Tasch, "Improved Universal MOSFET Electron Mobility Degradation Models for Circuit Simulation," IEEE TCAD of Integrated Circuits and Systems, vol. 12, no. 10, pp. 1542-1545, October 1993.

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    Interconnect Technology
  • H.T. Soh, C.P. Yue, A.M. McCarthy, C. Ryu, T.H. Lee, and C.F. Quate, " Ultra-Low Resistance, Through-Wafer Via (TWV) Technology and Its Applications in Three Dimensional Structures in Silicon," Japanese Journal of Applied Physics, vol. 38 (1999), Part 1, no. 4B, pp. 2393-2396, April 1999.
  • A.L.S. Loke, C. Ryu, C.P. Yue, J.S.H. Cho, and S.S. Wong, "Kinetics of Copper Drift in PECVD Dielectrics," IEEE Electron Device Letters, vol. 17, no. 12, pp. 549-551, December 1996.

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    Conference Papers

    High Frequency / RF IC's
  • S.S. Wong, P. Yue, R. Chang, S.-Y. Kim, B. Kleveland, and F. O'Mahony, "On-Chip Interconnect Inductance - Friend or Foe (Invited)," in Proceedings of the 2003 International Symposium on Quality Electronic Design, pp. 389-394, March 2003.
  • N. Talwalkar, C.P. Yue, and S.S. Wong, "An Integrated 5.2GHz CMOS T/R Switch with LC-Tuned Substrate Bias," in 2002 International Solid-State Circuits Conference Digest of Technical Papers, pp. 362-363, February 2003.
  • F. O'Mahony, C.P. Yue, M.A. Horowitz, and S.S. Wong, "10GHz Clock Distribution Using Coupled Standing-Wave Oscillators," in 2002 International Solid-State Circuits Conference Digest of Technical Papers, pp. 428-429, February 2003.
  • T. Blalack, Y. Leclercq, and C.P. Yue, "On-Chip RF Isolation Techniques (Invited)," in Proceedings of the 2002 Bipolar/BiCMOS Circuits and Technology Meeting, pp. 205-211, October 2002.
  • R.T. Chang, C.P. Yue, and S.S. Wong, "Near Speed-of-Light On-Chip Electrical Interconnect," in 2002 Symposium on VLSI Circuits Digest of Technical Papers, pp. 18-21, June 2002.
  • D. Su, M. Zargari, C.P. Yue, S. Rabii, D. Weber, B. Kaczynski, S. Mehta, K. Singh, S. Mendis, and B. Wooley, "A 5-GHz CMOS Transceiver for IEEE 802.11a Wireless LAN," in 2002 International Solid-State Circuits Conference Digest of Technical Papers, pp. 92-93, February 2002.
  • D.K. Shaeffer, A.R. Shahani, S.S. Mohan, H. Samavati, H. Rategh, M.M. Hershenson, M. Xu, C.P. Yue, D. Eddleman, and T.H. Lee, "A 115 mW CMOS GPS Receiver," in 1998 International Solid-State Circuits Conference Digest of Technical Papers, pp. 122-123, February 1998.

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    Device & Package Modeling
  • N. Talwalkar, C.P. Yue, and S.S. Wong, "Compact Modeling of High Frequency Phenomena for On-Chip Spiral Inductors (Invited Paper)," Workshop for Compact Modeling at the Modeling and Simulation of Microsystems Conference, February 2003.
  • C.P. Yue and S.S. Wong, "A Study on Substrate Effects of Silicon-Based RF Passive Components," in 1999 IEEE MTT-S International Microwave Symposium Digest, pp. 1625-1628, June 1999.
  • S.S. Mohan, C.P. Yue, M.M. Hershenson, S.S. Wong, and T.H. Lee, "Modeling and Characterization of On-chip Transformers," 1998 International Electron Devices Meeting Technical Digest, pp. 531-534, December 1998.
  • X. Qi, C.P. Yue, T. Arnborg, H.T. Soh, Z. Yu, and R. Dutton, "A Fast 3D Modeling Approach to Parasitics Extraction of Bonding Wires for RF Circuits," in 1998 International Electron Devices Meeting Technical Digest, pp. 299-302, December1998.
  • T. Soorapanth, C.P. Yue, D.K. Shaeffer, T.H. Lee, and S.S. Wong, "Analysis and Optimization of Accumulation-Mode Varactor for RF ICs," in 1998 Symposium on VLSI Circuits Digest of Technical Papers, pp. 32-33, June 1998.
  • C.P. Yue and S.S. Wong, "On-Chip Spiral Inductors with Patterned Ground Shields for Si-Based RF IC's," in 1997 Symposium on VLSI Circuits Digest of Technical Papers, pp. 85-86, June 1997.
  • C.P. Yue, C. Ryu, J. Lau, T.H. Lee, and S.S. Wong, "A Physical Model for Planar Spiral Inductors on Silicon," in 1996 International Electron Devices Meeting Technical Digest, pp. 155-158, December 1996.

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    CAD Tools for RF Design
  • F. O'Mahony, C.P. Yue, M.A. Horowitz, and S.S. Wong, "Design of a 10GHz Clock Distribution Network Using Coupled Standing-Wave Oscillators," in 40th Design Automation Conference Proceedings, pp. 682-687, June 2003.
  • C.P. Yue and S.S. Wong, "Design Strategy of On-Chip Inductors for Highly Integrated RF Systems (Invited)," in 36th Design Automation Conference Proceedings, pp. 982-987, June 1999.

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    Interconnect Technology
  • H.T. Soh, C.P. Yue, A.M. McCarthy, C. Ryu, T.H. Lee, C.F. Quate, "Ultra-Low Resistance, Through-Wafer Via (TWV) Technology and Its Applications in Three Dimensional Structures in Silicon," in Proceeding of 1998 International Conference on Solid State Devices and Materials, pp. 284-285, September 1998.

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    Reprints are provided for personal use only.


    Last Updated: December 1, 2003.
    Copyright © 2003 C. Patrick Yue. All Rights Reserved.

    Carnegie Mellon University
     |  Electrical & Computer Engineering