http://www.ece.cmu.edu/~coram/ 2013-02-16T12:02:18-05:00 http://www.ece.cmu.edu/~coram/ http://www.ece.cmu.edu/~coram/lib/images/favicon.ico text/html 2013-02-14T11:27:37-05:00 Gabe Weisz http://www.ece.cmu.edu/~coram/doku.php?id=publications&rev=1360859257&do=diff Publications [C-To-CoRAM: Compiling Perfect Loop Nests to the Portable CoRAM Abstraction.] Gabriel Weisz and James C. Hoe. ACM International Symposium on Field-Programmable Gate Arrays, February 2013, Monterey, CA. [CONNECT: Re-Examining Conventional Wisdom for Designing NoCs in the Context of FPGAs.] Michael K. Papamichael and James C. Hoe. ACM International Symposium on Field-Programmable Gate Arrays, February 2012, Monterey, CA. [Prototype and Evaluation of the CoRAM Memor… text/html 2013-01-09T11:12:41-05:00 Gabe Weisz http://www.ece.cmu.edu/~coram/doku.php?id=fpga_2013_tutorial&rev=1357747961&do=diff Cross-Platform FPGA Accelerator Development Using the CoRAM Virtual Architecture and the CONNECT Network-on-Chip Generator We are hosting the a CoRAM tutorial in conjunction with FPGA 2013. NOTE: Please make sure to bring a laptop with about 15GB free space and Virtualbox installed (<https://www.virtualbox.org>). text/html 2013-01-09T11:10:56-05:00 Gabe Weisz http://www.ece.cmu.edu/~coram/doku.php?id=micro-45_tutorial&rev=1357747856&do=diff Cross-Platform FPGA Accelerator Development Using the CoRAM Virtual Architecture and the CONNECT Network-on-Chip Generator We are hosting the first CoRAM tutorial in conjunction with MICRO-45. NOTE: Please make sure to bring a laptop with about 15GB free space and Virtualbox installed (<https://www.virtualbox.org>). text/html 2013-01-09T10:59:42-05:00 Gabe Weisz http://www.ece.cmu.edu/~coram/doku.php?id=topbar&rev=1357747182&do=diff * Home * Publications * Online Demo * FPGA 2013 Tutorial text/html 2012-11-30T08:59:14-05:00 Gabe Weisz http://www.ece.cmu.edu/~coram/doku.php?id=corflow_beta&rev=1354283954&do=diff CoRAM Online Demo - now supporting both the ML605 and DE4 This page hosts a limited-feature compiler that demonstrates the emulation of CoRAM on conventional FPGAs. The end-user develops an application using: 1) a high-level control thread specification and 2) application core logic developed in HDL (e.g., Verilog). Corflow automatically transforms the input into a stand-alone working design for a given target FPGA platform. The 40-minute video below gives a tutorial that walks the user throug… text/html 2012-11-30T08:58:53-05:00 Gabe Weisz http://www.ece.cmu.edu/~coram/doku.php?id=coram_files&rev=1354283933&do=diff Using CoRAM Three files are required to build a system with CoRAM: * The core logic source code file, commonly Verilog, that describes the hardware performing computation * The control thread source code, written in C, that coordinates data transfers and synchronization * The system specification file, a configuration file that describes how the system will be built, and is often standard to the output platform text/html 2012-11-29T15:11:26-05:00 Gabe Weisz http://www.ece.cmu.edu/~coram/doku.php?id=hands-on_exercise&rev=1354219886&do=diff