Testing for Emerging Technologies
Project
Chemically-assembled electronic nanotechnology (CAEN) is under intense investigation as a possible alternative or complement to CMOS-based computing [1-2]. CAEN, commonly referred to as the nanoFabric, is a form of molecular electronics that uses directed self-assembly and self-alignment to construct electronic circuits from nanometer-scale devices that exploit quantum-mechanical effects. Although expected to have densities greater than 10 billion gate-equivalents per cubic centimeter, the nanoFabric may exhibit defect densities of up to ten percent. These highly-defective circuits will therefore require a completely new approach to manufacturing computational devices. In order to achieve any level of significant yield, it will no longer be possible to discard a chip once a defect is found. Instead, a method of using defective chips must be devised. One approach will most likely focus on post-fabrication reconfiguration to determine the properties of the device in order to avoid or tolerate defects. For this approach, a defect map (created by testing the nanoFabric) is used to map the application onto the defective chip as depicted in Figure 1.
Selected Highlights
We developed a built-in self test (BIST) algorithm termed CAEN-BIST [3] that diagnoses faulty blocks in the nanoFabric. This CAEN-BIST approach takes advantage of the reconfigurability of the nanoFabric by configuring blocks as testers for their neighboring blocks. CAEN-BIST achieves 100% coverage for all single connection, bridging and stuck-line faults and recovery (diagnostic accuracy) of 92% for defect densities of up to 10%. Successive runs of CAEN-BIST approaches 100% recovery as shown in Figure 2. CAEN-BIST scales well with the size of the nanoFabric and defect density. A model of the nanoFabric was created to simulate the behavior of the architecture and to provide an evaluation environment for different testing algorithms. This environment allowed us to empirically show that CAEN-BIST can in fact be practically implemented and used to achieve accurate diagnostic results. The efficient creation of a defect map for the nanoFabric is a small but necessary step toward utilization of highly defective circuit fabrics such as CAEN.
Figure 1: Ideally, testing of the nanoFabric provides a defect map that can be used to avoid defective nanoBlocks when programming the application functionality. Click image to enlarge.
Figure 2: CAEN-BIST maintains high recovery for higher defect densities. Four iterations of CAEN-BIST provides nearly 100% average recovery for defect densities up to 20%. Click image to enlarge.
References
[1] | S. C. Goldstein and M. Bidiu, "NanoFabrics: Spatial Computing using Molecular Electronics," Proceedings of the International Symposium on Computer Architecture, July 2001. |
[2] | M. Mishra and S. C. Goldstein, "Defect Tolerance at the End of the Roadmap," Proceedings of the International Test Conference, Oct. 2003. |
[3] | J. G. Brown and S. Blanton, "CAEN-BIST: Testing the NanoFabric," Proceedings of the International Test Conference, Oct. 2003. |