Publications

2006

S. Biswas and R. D. Blanton, "Statistical Test Compaction Using Binary Decision Trees," IEEE Design and Test of Computers: Process Variation and Stochastic Design and Test, pp. 452-462, Nov.-Dec. 2006.

R. D. (Shawn) Blanton, K. N. Dwarakanath, and R. Desineni, "Defect Modeling Using Fault Tuples," IEEE Trans. on CAD of Integrated Circuits and Systems, 2006.

N. K. Bhatti and R. D. Blanton, "Diagnostic Test Generation for Arbitrary Faults," International Test Conference, Nov. 2006.

R. Desineni, O. Poku, and R. D. Blanton, "A Logic Diagnosis Methodology for Improved Localization and Extraction of Accurate Defect Behavior," International Test Conference, Oct. 2006.

J. E. Nelson, J. G. Brown, R. Desineni, and R. D. Blanton, "Multiple-Detect ATPG Based on Physical Neighborhoods," Design Automation Conference, July 2006.

T. Jiang and R. D. Blanton, "Inductive Fault Analysis of Surface-Micromachined MEMS," IEEE Transactions on CAD of Integrated Circuits and Systems, Vol. 25, Issue 6, pp. 1104-1116, June 2006.

J. G. Brown and R. D. S. Blanton, "Exploiting Regularity for Inductive Fault Analysis," VLSI Test Symposium, pp. 364-369, April 2006.

J. E. Nelson, T. Zanon, R. Desineni, J. G. Brown, N. Patil, W. Maly, and R. D. Blanton, "Extraction of Defect Density and Size Distributions from Wafer Sort Test Results," Proc. of Design Automation and Test in Europe, pp. 913-918, March 2006.

N. Deb and R. D. Blanton, "Built-in self-test of MEMS accelerometers," Journal of MEMS, Vol. 15, Issue 1, pp. 52-68, Feb. 2006.

2005

R. Desineni and R. D. Blanton, "Diagnosis of Arbitrary Defects Using Neighborhood Function Extraction," VLSI Test Symposium, pp. 366-373, May 2005.

S. Biswas, P. Li, R. D. Blanton, and L. Pileggi, "Specification Test Compaction for Analog Circuits and MEMS," Proc. of Design Automation and Test in Europe, pp. 164-169, Mar. 2005.

S. Blanton and S. Mitra, "Testing nanometer digital integrated circuits: myths, reality and the road ahead," International Conference on VLSI Design, pp. 8-9, Jan. 2005.

2004

J. G. Brown and R. D. Blanton, "CAEN-BIST: Testing the Nanofabric," International Test Conference, pp. 462-471, Nov. 2004.

T. Vogels, T. Zanon, R. Desineni, R. D. Blanton, W. Maly, J. G. Brown, J. E. Nelson, Y. Fei, X. Huang, P. Gopalakrishnan, M. Mishra, V. Rovner, and S. Tiwary, "Benchmarking diagnosis algorithms with a diverse set of IC deformations," International Test Conference, pp. 508-517, Nov. 2004.

T. Zanon and W. Maly, "Classification of IC Process Deformation Characteristics Using Memory Fail Bitmaps," International Symposium for Testing and Failure Analysis, pp. 566-575, Nov. 2004.

S. Biswas, K. N. Dwarakanath, R. D. Blanton, "Generalized Sensitization using Fault Tuple," VLSI Test Symposium, April 2004.

S. Biswas, K. N. Dwarakanath, R. D. Blanton, "Generalized Sensitization using Fault Tuple," VLSI Test Symposium, April 2004.

N. Deb and R. D. Blanton, "Multi-modal built-in self-test for symmetric microsystems," VLSI Test Symposium, pp. 139-147, Apr. 2004.

L. Chunsheng, K. N. Dwarakanath, K. Chakrabarty, and R. D. Blanton, "Compact dictionaries for diagnosis of unmodeled faults in scan-BIST," IEEE Computer society Annual Symposium on VLSI, pp. 173-178, Feb. 2004.