I am a Ph.D. candidate in the Department of Electrical and Computer Engineering at Carnegie Mellon University (CMU) working with Professor Radu Marculescu. My research interests include communication-centric design methodologies for nano-scale system-on-chip, user-centric design methodology for heterogeneous embedded systems, CAD algorithms for multiprocessor system with parallel computing architecture, and any fault tolerant techniques for system optimization. I was an intern in Strategic CAD Lab at Intel Corporation during the fall of 2008, working on problems in communication fabric optimization for multiprocessor system-on-chips.
Before coming to Carnegie Mellon, I was an instructor in National Chiao Tung University (NCTU) , Taiwan for one year. I received my M.S. and B.S. degree in Electronics Engineering and Electrical and Control Engineering from NCTU in 2004 and 2002, respectively.

Education:

Carnegie Mellon University (CMU), Pittsburgh, PA

Ph.D. Candidate in Electrical and Computer Engineering (2005-present)

Thesis title: Designing Networks-on-Chip with Users in Mind

Advisor: Prof. Radu Marculescu (System Level Design Group)

National Chiao-Tung University (NCTU), Taiwan

M.S. in Electronics Engineering (2002-2004)

Thesis - Highest score in the Institute of Electronics

Thesis title: "On Automatic Pattern Generation for Interconnect Verification Based on Graph Automorphism"

Areas of Concentration: CAD algorithms for SoC Verification

Advisor: Prof. Jing-Yang Jou (Electronic Design Automation Lab)

B.S. in Electrical and Control Engineering (1998-2002)

Graduate Student Outstanding Contribution Award

Areas of Concentration: JPEG and JPEG 2000 implementation using MFC library

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