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Understanding the Performance of Concurrent Error Detecting Superscalar Microarchitectures

Tuesday December 6, 2005
Hamerschlag Hall D-210
4:00 pm

This is a practice talk for an invited paper in the 5th IEEE International Symposium on Signal Processing and Information Technology.

Jared Smolens
Carnegie Mellon University

Superscalar out-of-order microarchitectures can be modified to support redundant execution of a program as two concurrent threads for soft-error detection. However, the extra workload from redundant execution incurs a performance penalty due to increased contention for resources throughout the datapath. In this talk, I present four key parameters that affect performance of these designs, namely 1) issue and functional unit bandwidth, 2) issue queue and reorder buffer capacity, 3) decode and retirement bandwidth, and 4) coupling between redundant threads' instantaneous resource requirements. I then survey existing work in concurrent error detecting superscalar microarchitectures and evaluate these proposals with respect to the four factors.

Jared Smolens is a PhD candidate in the ECE department at Carnegie Mellon University, where he is advised by Prof. James Hoe. He received his BS and MS in ECE from Carnegie Mellon University. His research interests are in multiprocessor and microprocessor architectures, fault tolerance, and performance modeling.


Department of Electrical and Computer EngineeringCarnegie Mellon UniversitySchool of Computer Science