Spatial Computation

Tuesday October 21, 2003
Hamerschlag Hall D-210
4:00 pm

Mihai Budiu
Carnegie Mellon University

I will present a compilation framework for translating ANSI C programs into hardware dataflow machines. The framework is embodied in the CASH compiler, a Compiler for Application-Specific Hardware. CASH generates asynchronous hardware circuits which directly implement the functionality of the source program, without using any interpretative structures. This style of computation is dubbed ``Spatial Computation''.

I will present a critical discussion of this new model of computation. generated circuits using simulation. Using media processing benchmarks, I show that for the domain of embedded computation, the circuits generated by CASH can sustain high ILP level parallelism, due to the effective use of dataflow software pipelining. A comparison of
Spatial Computation and superscalar processors highlights some of the weaknesses of this model of computation, such as the lack of branch prediction and register renaming.

Mihai works in the area of exotic compilers and strange computer architectures. He got started on this track with work on PipeRench, the infinite hardware machine. Last week he has submitted his Ph.D. thesis on Spatial Computation to his advisor.