Stream Processing

Tuesday October 15, 2002
Wean 4623
3:30 p.m.

Bill Dally
Stanford University

Modern VLSI technology enables 100GFLOPS chips (e.g., NVIDIA), 20 cent/MByte memory, and chips with 1Tbit/s of pin bandwidth, all of the ingredients for powerful and cost effective computing. Building computers from conventional microprocessors, however, does not realize the potential of today's technology. Stream processors exploit the characteristics of modern VLSI technology to improve the performance per unit cost of many computing tasks by an order of magnitude or more. Casting an application as a stream program makes all communication explicit, allowing much of it to be kept local, and hides the latency of global communication when it is needed. This in turn enables architectures with very high arithmetic intensity, e.g, 100GFLOPS chips with 10GBytes/s of memory bandwidth that sustain a large fraction of peak performance.
At Stanford we have built Imagine, a prototype stream processor that demonstrates the efficiency and generality of stream processing on signal-processing, image-processing, and graphics applications. We are now developing a streaming supercomputer to apply this technology to scientific computing. This talk will describe stream processing, Imagine, the streaming supercomputer, and their programming systems.

Bill and his group have developed system architecture, network architecture, signaling, routing, and synchronization technology that can be found in most large parallel computers today. While at Bell Telephone Laboratories Bill contributed to the design of the BELLMAC32 microprocessor and designed the MARS hardware accelerator. He was a Research Assistant and then a Research Fellow at Caltech where he designed the MOSSIM Simulation Engine and the Torus Routing Chip which pioneered wormhole routing and virtual-channel flow control. While a Professor of Electrical Engineering and Computer Science at the Massachusetts Institute of Technology he and his group built the J-Machine and the M-Machine, experimental parallel computer systems that pioneered the separation of mechanisms from programming models and demonstrated very low overhead mechanisms for synchronization and communication. Bill is currently a Professor of Electrical Engineering and Computer Science at Stanford University where his group has developed the Imagine processor, which introduced the concepts of stream processing and partitioned register organizations, and low-power high-speed signaling technology. Bill has worked with Cray Research and Intel to incorporate many of these innovations in commercial parallel computers, with Avici Systems to incorporate this technology into Internet routers, and co founded Velio Communications to commercialize high-speed signaling technology. He is a Fellow of the IEEE and has received numerous honors including the ACM Maurice Wilkes award. He currently leads projects on high-speed signaling, computer architecture, and network architecture. He has published over 150 papers in these areas and is an author of the textbook, Digital Systems Engineering.