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DBMbench: Fast and Accurate Database Workload Representation on Modern Microarchitecture

Tuesday October 11, 2005
Hamerschlag Hall D-210
4:00 pm

This is a practice talk for the International Conference of Computer Science and Software Engineering.

Minglong Shao
Carnegie Mellon University

With the proliferation of database workloads on servers, much recent research on server architecture has focused on database system benchmarks. The TPC benchmarks for the two most common server workloads, OLTP and DSS, have been used extensively in the database community to evaluate the database system functionality and performance. Unfortunately, these benchmarks fall short of being effective in microarchitecture and memory system research due to several key shortcomings. First, setting up the experimental environment and tuning these benchmarks to match the workload behavior of interest involves extremely complex procedures. Second, the benchmarks themselves are complex and preclude accurate correlation of microarchitecture- and memory-level bottlenecks to dominant workload characteristics. Finally, industrial-grade configurations of such benchmarks are too large and preclude their use in detailed but slow microarchitectural simulation studies of future servers. In this paper, we first present an analysis of the dominant behavior in DSS and OLTP workloads, and highlight their key processor and memory performance characteristics. We then introduce a systematic scaling framework to scale down the TPC benchmarks. Finally, we propose the DBmbench consisting of two substantially scaled-down benchmarks: mTPC-H and mTPC-C that accurately (> 95%) capture the processor and memory performance behavior of DSS and OLTP workloads.

Minglong Shao is a Ph.D. candidate in Carnegie Mellon University, working with Professor Anastassia Ailamaki. She received her Bachelor's degree in Computer Science from Tsinghua University at Beijing, China. Her research interests are Database performance characterization and new data organization on modern CPUs and disks.


Department of Electrical and Computer EngineeringCarnegie Mellon UniversitySchool of Computer Science