Architectures with GALS Clocking Schemes
Tuesday September 24, 2002
Hamerschlag Hall D-210
Carnegie Mellon University
As clock frequency increases, global clock distribution becomes
increasingly problematic. The resulting clock skew and high power
dissipation negatively impact system functionality and cost. These
problems can be overcome by removing the clock entirely-by using
a self-timed architecture-but this methodology has its own set of
difficulties, such as a lack of asynchronous design tools and the
reluctance of industry to break from the long-standing and proven
paradigm of synchronous designs. A globally asynchronous, locally
synchronous (GALS) approach, however, can serve as in an intermediate
step between synchronicity and asynchronicity.
Several GALS designs have been proposed and have had reasonable power-performance
tradeoffs, when the different synchronous regions are clocked at different
speeds. However, the proposed designs dispatch instructions to issue queues
based on instruction type. While this is the standard method, it may not
be the best, because it implicitly assumes that all instructions are equally
important. Recent studies have shown that some instructions have a greater
impact on execution time than others. Since that is true, this assumption
reduces the flexibility offered by different clocking regions.
In this project, we explore the impact on a GALS system of dispatching
instructions to issue queues based on criticality instead of type. Critical
instructions will be sent to fast queues while less critical queues will
be sent to slower ones. We hope to show that this technique yields a better
power-performance ratio than previously proposed GALS designs. In this
talk, I will describe the proposed architecture in detail, discuss an
unexpected complication, and present preliminary results.
Katrina Zwicker is a M.S. student in the Department of Electrical and
Computer Engineering at Carnegie Mellon University. She received her B.S.
in Computer Engineering from Clemson University in 2000. Currently, she
is a member of the EnyAC research group led by Prof. Diana Marculescu.
Her research focuses on exploring low power and energy aware microarchitectures.