PROTOFLEX: FPGA-Accelerated Instrumentation

Tuesday September 23, 2008
Hamerschlag Hall D-210
4:30 pm

Michael Papamichael
Carnegie Mellon University

The use of FPGAs has proven to be very effective at overcoming the throughput limitations of existing full-system functional multiprocessor simulators. A key advantage of FPGA-accelerated simulation over conventional software simulation is the support for low overhead instrumentation, which can be carried out by FPGA-resident instrumentation components operating in parallel. Fast, flexible functional instrumentation is useful for various hardware research activities, such as trace generation, workload warming and characterization, development of software debugging/monitoring tools and carrying out architectural studies. In the context of performance studies using simulation sampling techniques (e.g. SMARTS), fast FPGA-based instrumentation can vastly reduce simulation turn-around time.

This presentation is focused on two examples of FPGA-accelerated instrumentation components, which leverage our existing FPGA-based full-system functional simulation infrastructure and can be used in the scope of fast functional workload warming. The first instrumentation component functionally models a two-level Piranha-like chip multiprocessor cache hierarchy with private L1 I&D caches and a shared non-inclusive L2, while the second instrumentation component simulates the branch predictors of the target multiprocessor system. The presentation includes virtualization techniques that significantly simplified the implementation and concludes with a brief demo of a web-based interface for real-time display of system and cache statistics.

Michael K. Papamichael is a second-year Ph.D. student in the Computer Science Department at Carnegie Mellon University, working with Prof. James C. Hoe. His research interests are in the area of computer architecture, with emphasis on FPGA-accelerated simulation and instrumentation for multiprocessor architectures.