Transactional
Coherence & Consistency
Tuesday September 21, 2004
Hamerschlag Hall D-210
4:00 pm
Christos Kozyrakis
Stanford University
With uniprocessor systems running into ILP limits and fundamental VLSI
constraints, parallel architectures provide a realistic path towards
scalable performance. Nevertheless, shared memory multiprocessors are
neither simple to design nor easy to program. Transactional Coherence
and Consistency (TCC) is a new model for shared memory systems with the
potential to address both issues. TCC relies on user-defined, light-weight
transactions as the basic unit of parallel work, communication, memory
coherence, memory consistency, and error recovery. TCC simplifies shared
memory hardware design by eliminating the need for cache line ownership
tracking in the cache coherence protocol. It also replaces the need for
small, low latency messages for cache coherence. TCC simplifies parallel
programming by eliminating the need for manual orchestration of parallelism
using locks. The use of a single abstraction for parallelism, communication,
and synchronization makes it easy for the programmer to identify and
remove performance bottlenecks. This talk will introduce the hardware
and software aspects of TCC and provide an initial evaluation of its
potential as a shared memory model.
Christos Kozyrakis is an assistant professor of Electrical Engineering
and Computer Science at Stanford University. He holds a B.S. from the
University of Crete in Greece and a Ph.D. from the University of California
at Berkeley. Christos' research focuses on architectures, compilers,
and programming models for parallel computer systems.
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