Detecting Emerging Wearout Faults

Tuesday September 11, 2007
Hamerschlag Hall D-210
4:30 pm

Jared Smolens
Carnegie Mellon University

Aggressive CMOS scaling accelerates transistor and interconnect wearout, resulting in shorter and less predictable lifetimes for microprocessors. Studies show that wearout faults have a gradual onset, manifesting initially as timing faults before eventually leading to hard breakdown. Prior work suggests detecting wearout faults as they begin to affect normal operation, but these techniques require complex circuit and/or microarchitectural changes. My proposal, FIRST (Fingerprints In Reliability and Self Test), uses existing design-for-test hardware (scanout chains) and infrequent periodic tests under reduced frequency guardbands to observe marginal behavior that is an indication of wearout. FIRST is a low-overhead, complexity-effective methodology for detecting emerging wearout faults before they affect normal operation. I discuss the operation of FIRST error detection, present a model for wearout fault simulation, and demonstrate FIRST's effectiveness on a portion of a commercial microprocessor design.

Jared Smolens is a PhD candidate at Carnegie Mellon University, where he is advised by Prof. James Hoe. He received his BS and MS in ECE from Carnegie Mellon University. His research interests are in multiprocessor and microprocessor architectures, fault tolerance, and performance modeling.