A New Microarchitecture Paradigm for High-Performance General Purpose Processor Synthesis

Tuesday September 4, 2007
Hamerschlag Hall D-210
4:30 pm

Eriko Nurvitadhi
Carnegie Mellon University

The complexity and intricacy of modern high-performance microprocessors are beyond the reach of state-of-the-art high-level design and synthesis. The goal of practical microprocessor synthesis may be better served by rethinking fundamentally the underlying microarchitecture. We observe that a high-performance microprocessor spends a great majority of the time in exception free execution of a small, basic subset of the ISA. It is only this core set of behaviors that decides the overall performance of the microprocessor.

We propose a new microarchitecture paradigm comprising high-performance primary datapaths for only exception-free execution of the common-case instructions. By limiting the scope to only a highly regular set of instruction behaviors, we expect that even the complexity of superscalar out of-order execution can be brought within reach of template-based high-level synthesis. Unsupported instruction behaviors are relegated to a secondary microcoded datapath of the complete ISA behavior, without bearing on the overall processor performance.

This talk will introduce this new microarchitecture paradigm we call Chimera (a creature from mythology with the heads of a lion and a goat) and show instruction profiling results to provide insights on design simplification potentials provided by Chimera. Then, the talk will report on our initial progress on automatically synthesizing the secondary microcoded portion of the Chimera microarchitecture from a graph-based ISA specification.

Eriko Nurvitadhi is a graduate student in the Electrical and Computer Engineering Department at Carnegie Mellon. He received his BSs, BA, MS, and MBA degrees from Oregon State University. His advisor is Prof. James Hoe.