Link to CALCM Home  

The Bulk Multicore Architecture

Monday June 2, 2008
Hamerschlag Hall 1112
2:30 pm

Josep Torrellas
University of Illinois, Urbana-Champaign

One of the biggest challenges facing computer architecture today is the design of parallel architectures that efficiently support a highly-programmable environment. In this talk, I will present the Bulk Multicore Architecture, an architecture that is highly programmable, while delivering high performance and keeping the hardware simple. The Bulk Multicore is based on the idea of eliminating the commit of individual instructions. Its architecture is influenced by thread-level speculation ideas.

Josep Torrellas is a Professor and Willett Faculty Scholar at the University of Illinois. Prior to being at Illinois, Torrellas received a PhD from Stanford University. He also spent a year at IBM's T.J. Watson Research Center. Torrellas's research area is multiprocessor computer architecture. He leads the Illinois Aggressive COMA Multiprocessor group. He has been involved in the Stanford DASH and the Illinois Cedar multiprocessor projects, and contributed extensively in the area of thread-level speculation.


Department of Electrical and Computer EngineeringCarnegie Mellon UniversitySchool of Computer Science