Power and Performance Evaluation
of Globally Asynchronous, Locally Synchronous Processors
April 30, 2002 Tuesday
Hamerschlag Hall 1112
4:00 p.m.
Diana Marculescu
Assistant Professor, Dept. of ECE, CMU
Due to increasing clock speeds, increasing design sizes and shrinking
technologies, it is becoming more and more challenging to distribute
a single global clock throughout a chip. In this talk, I will discuss
the effect of using a Globally Asynchronous Locally Synchronous
(GALS) organization for a superscalar, out-of-order processor, both
in terms of power and performance. To this end, we propose a novel
modeling and simulation environment for multiple clock cores with
static or dynamically variable voltages for each synchronous block.
Using this design exploration environment we were able to assess
the power/performance trade-offs available for Multiple Clock, Single
Voltage (MCSV), as well as Multiple Clock, Multiple Voltage (MCMV)
cores. Our results show that MCSV processors can be more power efficient
than their fully synchronous counterparts, at the expense of an
average 8% performance degradation. However, in some cases, the
extra execution time translates into more power consumption, thus
offsetting the power benefits of a global clockless design. On the
other hand, for some applications, a MCMV design can provide more
than 20% total energy savings with less than 7% performance reduction
when compared to the fully synchronous core. I will conclude the
talk with possible directions for future research and applications
of GALS in multiple speed/multiple voltage pipelines.
Diana Marculescu is an Assistant Professor
of ECE at Carnegie Mellon University. She has received her Ph.D. in
Computer Engineering in 1998 from University of Southern California
and her M.S. in Computer Science from "Politehnica" University of
Bucharest in 1991. Diana Marculescu is a recipient of a NSF Career
Award (2000) and a member of the organizing committee of the ACM/IEEE
Intl. Symposium on Low Power Electronics and Design. She also serves
on the technical program committee of several conferences, including
IEEE/ACM Intl. Conference on Computer-Aided Design and IEEE Design,
Automation and Test in Europe Conference. Her research interests are
in the area of energy aware computing, VLSI, computer architecture
and CAD for power modeling and estimation.
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