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Flexible Hardware Acceleration for Instruction-Grain Program Monitoring

Tuesday April 29, 2008
Hamerschlag Hall D-210
4:00 pm

Shimin Chen
Intel Research

Instruction-grain program monitoring tools, which check and analyze executing programs at the granularity of individual instructions, are invaluable for quickly detecting bugs and security attacks and then limiting their damage (via containment and/or recovery). Unfortunately, their fine-grain nature implies very high monitoring overheads for software-only tools, which are typically based on dynamic binary instrumentation. Previous hardware proposals either focus on mechanisms that target specific bugs or address only the cost of binary instrumentation.

In this talk, we propose a flexible hardware solution for accelerating a wide range of instruction-grain monitoring tools. By examining a number of diverse tools (for memory checking, security tracking, and data race detection), we identify three significant common sources of overheads and then propose three novel hardware techniques for addressing these overheads: Inheritance Tracking, Idempotent Filters, and Metadata-TLBs. Together, these constitute a general-purpose hardware acceleration framework. Experimental results show our framework reduces overheads by 2-3X over the previous state-of-the-art, while supporting the needed flexibility.

Shimin Chen is a research scientist at Intel Research Pittsburgh. He received his Ph.D. in Computer Science from Carnegie Mellon University in 2005, and his B.E. and M.E. from Tsinghua University in China in 1997 and 1999. Chen's research interests include database systems, computer architectures, and software systems. His Ph.D. work focused on redesigning data structures and algorithms in relational database systems in light of modern computer architecture features such as CPU cache prefetching. At Intel Research, he has been working on exploiting many-core processors for software reliability and performance, and supporting data-intensive and compute-intensive applications on data-center-scale clusters.


Department of Electrical and Computer EngineeringCarnegie Mellon UniversitySchool of Computer Science