Hybrid Sequential-Spatial Computers with Unified Instruction Set Architectures

Tuesday April 27, 2004
Hamerschlag Hall D-210
4:00 pm

Brian Van Essen & Benjamin Ylvisåker
Carnegie Mellon University

Existing spatial engines (e.g. FPGAs, PipeRench) have been shown to provide radical speedup in several application domains, but are difficult to integrate into full system applications. Hybrid computer architectures seek to combine the power of spatial computing engines with the flexibility of sequential processors. The difference between the spatial and sequential programming models limits the success of current efforts. Our research focuses on creating unified architectures and programming models for hybrid microarchitectures.

Brian Van Essen is a Ph.D. candidate in Electrical and Computer Engineering at CMU. After attempting several startups in reconfigurable processing he decided that hybrid computer architecture research was best pursued in the academic community. As a result of his advisor leaving, he will be continuing his Ph.D. work at the University of Washington. He received his M.S. and B.S. in 1999 from Carnegie Mellon University.

Benjamin Ylvisåker is part Ph.D. student, part M.S. student in the Department of Electrical and Computer Engineering at Carnegie Mellon University. After misplacing his advisor, he decided to cut his losses and complete his studies at a school closer to an ocean. With any luck Dave will bring some cookies to our seminar, too.