Fully Associative Software-Managed Cache Design
Tuesday March 15, 2005
Hamerschlag Hall D-210
Carnegie Mellon University
Paper: Erik Hallnor and Steven Reinhardt, A
Fully Associative Software-Managed Cache Design, ISCA-27, June
Modern processors can retire thousands of instructions in the time
it takes to access DRAM, and hence cache miss rates are tightly
coupled to performance. With secondary cache sizes growing to multiple
megabytes, this paper from ISCA 2000 examines a software-managed
cache design that provides intelligent replacement policies in a
fully-associative secondary cache. This paper made two primary contributions:
the design of a fully-associative structure called an indirect index
cache (IIC), and a replacement algorithm called "generational
replacement" that is designed to improve miss rates in an IIC.
Using a trace-based evaluation of various desktop and commercial
workloads, the authors show that IIC with generational replacement
reduced the miss rate by 8% to 85% when compared to a 4-way design
with LRU replacement.
In this talk, I will review the contributions of the IIC paper
and discuss what the last five years have taught us about the challenges
of large cache design.
Brian Gold is a 2nd year PhD student in the ECE department, working
for Babak Falsafi on the TRUSS (Total Reliability Using Scalable
Servers) project. His research interests are in reliable, high-performance
architectures for commercial workloads. He spends his remaining
time and stipend feeding Josie, the great dane.