Timekeeping in the Memory System: Predicting and Optimizing Memory
Behavior
Tuesday March 4, 2003
Hamerschlag Hall 1112
4:30 p.m.
Nikos Hardavellas
Carnegie Mellon University
Technological advancements in semiconductor fabrication, coupled with
architectural innovation, have resulted in lighting-speed improvements
in processor performance which doubles every 18 months. On the other hand,
memory performance improves at a glacial 10% annually. The memory wall
is rising fast and promotes memory reference behavior to the dominant
factor determining overall performance of many important applications.
Techniques to predict memory reference patterns are on the rescue, and
have attracted a flurry of interest at top computer architecture conferences.
Additionally, new trends in processor architecture and software engineering
offer fresh opportunities to speculation at the memory system. In their
recent work, Zhigang Hu, Stefanos Kaxiras and Margaret Martonosi offer
a new perspective on the problem of using prediction to optimize memory
behavior. They show quantitatively the extent to which detailed time characteristics
of past memory reference events are predictive of future reference patterns,
and propose a new family of predictors. This talk reviews their work with
the same title, aiming to provoke thinking and discussion on the issue.
Nikos Hardavellas is a first year PhD student in the Computer Science
Department at Carnegie Mellon. He is advised by Babak Falsafi and Anastassia
Ailamaki. His primary interests are in microprocessor and multiprocessor
architecture, and performance analysis of database systems.
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