An Empirical Study of Data Speculation Use on the Intel Itanium 2 Processor

Tuesday February 1, 2005
Hamerschlag Hall D-210
4:00 pm

This is a practice talk for the 9th International Workshop on Interaction between Compilers and Computer Architecture (INTERACT-9).

Jose Baiocchi
University of Pittsburgh

The Intel Itanium architecture uses a dedicated 32-entry hardware table, the Advance Load Address Table (ALAT) to support data speculation via an instruction set interface. This study presents an empirical evaluation of the use of the ALAT and data speculative instructions for several optimizing compilers. We determined what and how often compilers generated the different speculative instructions, and used the Itanium's hardware performance counters to evaluate their run-time behavior. We also performed a limit study by modifying one compiler to always generate data speculation when possible. We found that this aggressive approach significantly increased the amount of data speculation and often resulted in performance improvements, of as much of 10% in one case. Since it worsened performance only for one application and then only for some inputs, we conclude that more aggressive data speculation heuristics than those employed by current compilers are desirable and may further improve performance gains from data speculation.

Jose Baiocchi is a second year graduate student in the Department of Computer Science at University of Pittsburgh, where he works with Prof. Markus Mock as a member of the Chasqui Research Group. His research interests include the development of dynamic program analysis and dynamic compilation techniques to improve traditional program optimizations and which may require additional hardware support. Jose, a B.S. in Informatics Engineering from Pontificia Universidad Catolica del Peru (PUCP), has completely passed his Preliminary Examinations last term and is continuing in the PhD program.