http://www.ece.cmu.edu/~calcm/ 2009-11-07T14:50:32-05:00 http://www.ece.cmu.edu/~calcm/ http://www.ece.cmu.edu/~calcm/lib/images/favicon.ico text/html 2009-11-07T14:31:37-05:00 Michael Papamichael http://www.ece.cmu.edu/~calcm/doku.php?id=reading_group:reading&rev=1257622297&do=diff The CALCM reading group meets weekly to discuss papers from recent Computer Architecture conferences. Interested students should sign up for specific papers that they would be interested in leading. Role of group leaders: * Introducing the paper (the problem/motivation, basic ideas of the solution, and a very brief overview of results, strengths, weaknesses) * Raising questions related to the paper and the problem at hand * Identifying some more blue-sky brainstorming topics related to… text/html 2009-10-26T16:05:21-05:00 Yoongu Kim http://www.ece.cmu.edu/~calcm/doku.php?id=seminars&rev=1256587521&do=diff The CALCM seminar series is a weekly meeting of faculty and students with broad interests in Computer Architecture, and is open to all. The seminar is an excellent medium for CALCM students/faculty to present their recent research results and/or practice conference presentations, for students to polish their presentation skills and present external results from recent conferences, and for outside speakers to tell us about their work. text/html 2009-10-26T00:16:44-05:00 Yoongu Kim http://www.ece.cmu.edu/~calcm/doku.php?id=seminar_10_20_09&rev=1256530604&do=diff Tuesday Oct. 20, 2009 Hamerschlag Hall D-210 4:00 pm Ippokratis Pandis Carnegie Mellon University Abstract While hardware technology has undergone major advancements over the past decade, transaction processing systems have remained largely unchanged. The number of cores on a chip grows exponentially, following Moore's Law, allowing for an ever-increasing number of transactions to execute in parallel. As the number of concurrently-executing transactions increases, contended critical se… text/html 2009-10-25T23:56:41-05:00 Yoongu Kim http://www.ece.cmu.edu/~calcm/doku.php?id=seminar_10_06_09&rev=1256529401&do=diff Tuesday Oct. 6, 2009 Hamerschlag Hall D-210 4:00 pm Janani Mukundan Cornell University Abstract Chip Multiprocessors (CMPs) represent an at-tractive approach for sustaining scalable performance improvement in the billion-transistor era. Although the prime target of CMPs is highly parallel codes, many of the software products being written are still single-threaded applications, and even many parallel codes still contain nontrivial sequential sections. This poses a difficult design trad… text/html 2009-10-25T23:55:59-05:00 Yoongu Kim http://www.ece.cmu.edu/~calcm/doku.php?id=seminar_10_13_09&rev=1256529359&do=diff Tuesday Oct. 13, 2009 Hamerschlag Hall D-210 4:00 pm Vas Chellappa Carnegie Mellon University Abstract High-performance discrete Fourier transform (DFT) libraries are an important requirement on many computing platforms. The complexity of manually writing and tuning DFT libraries to target architectures is the motivation for the Spiral project, which can automatically generate platform-adapted libraries.