Tuesday Feb. 26, 2013
Hamerschlag Hall 2117
Qiuling Zhu (ECE, PhD)
This talk presents an application-specific logic-in-memory (LiM) to accelerate power-limited and memory-bound applications by application-specific memory specialization and localized in-memory processing. Enabled by the regular layout pattern construct-based circuit design targeted at sub-20 nm technology nodes, LiM designs allow a powerful and fine integration of logic and memory cells, enabling more localized computation, and thus improving performance and energy efficiency. An end-to-end LiM design framework is developed to efficiently and reliably synthesize the LiM hard IPs automatically from system level design specifications, and facilitate the co-optimization of algorithms, architectures, and circuits. We explore different architectural integration choices of the LiM blocks in an energy-efficient computing system. While LiM can be used as a specialized on-chip local memory, it can also be integrated with 3D die-stacked memory architecture for near-DRAM data pre-processing. We present LiM chip designs for several important memory-bound applications and large-scale graph problems based on sparse matrix operations. This work demonstrates that the recent lower level technology advances create opportunities for us to re-think the algorithm and re-architect the memory structure to achieve superior power and performance efficiency in memory-bound high performance computing.
Qiuling Zhu is currently a 4th-year Ph.D. candidate in the department of Electrical and Computer Engineering at Carnegie Mellon University, where she is advised by Prof. Larry Pileggi and Prof. Franz Franchetti. She received her B.S. degree from Huazhong University of Science and Technology, Wuhan, China and her M.S. degree from Tsinghua University, Beijing, China in 2007 and 2009, respectively. Her research is focused on application-specific hardware synthesis of logic and memory.
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