Statistical Thermal Evaluation and Mitigation for 3D Chip-Multiprocessors

Tuesday Apr. 5, 2011
Hamerschlag Hall D-210
4:00 pm

Da-Cheng Juan
Carnegie Mellon University


Thermal issues have become critical roadblocks for achieving highly reliable three-dimensional (3D) integrated circuits. The presence of process variations further deteriorates these problems. In this talk, we provide both the evaluation and mitigation of the impact of leakage power variations on the temperature profile of 3D Chip-Multiprocessors (CMPs). Furthermore, we also propose a methodology to predict the maximum temperature, based on which an effective tier-stacking algorithm is proposed and evaluated. Experimental results show that the proposed prediction achieves less than 2% error rate, while the tier-stacking algorithm significantly improves the thermal yield from 44.4% to 81.1% for a 4-tier 3D CMP.


Da-Cheng Juan received his B.S. and M.S. degrees in Computer Science department at National Tsing Hua University in 2005 and 2007, respectively. He is currently a Ph.D. student in the Electrical and Computer Engineering department at Carnegie Mellon University, advised by Prof. Diana Marculescu. His research interests include reliability-aware 3D architectures, machine learning, low-power VLSI/EDA technologies, and algorithm designs.

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