Thursday Sept. 9, 2010
Hamerschlag Hall D-210
Computer Science Dept., University of Texas at Austin
Driven by increasing integration density, future chip-level multiprocessors (CMPs) and systems-on-a-chip (SOCs) will have numerous processing elements. In these substrates, the presence of multiple concurrently-executing applications can pressure and congest the on-chip network, undermining application performance through diminished accessibility to on-chip resources such as memory controllers. In many systems, performance stability and predictability are essential for proper operation, examples being consolidated servers on CMPs and real-time SOCs. Such systems necessitate chip-level quality-of-service (QOS) guarantees. In this talk, I will discuss QOS in the context of networks-on-a-chip (NOCs). I will introduce NOC QOS desiderata, describe shortcomings of conventional approaches, and present a new QOS architecture called Preemptive Virtual Clock (PVC). PVC provides strong guarantees and good performance in an area- and energy-effective manner, making the scheme attractive for on-chip implementation.
Boris Grot is a Ph.D. candidate at the University of Texas at Austin, advised by Prof. Steve Keckler. His research is directed toward identifying and addressing challenges in tomorrow's on-chip interconnection networks. To date, Boris has worked on problems in topology, congestion-aware routing, and quality-of-service. In addition to interconnects, he is interested in energy-efficient computing, system-level service guarantees, and effective heterogeneous architectures. Boris expects to graduate in Spring 2011 and is seeking a position in academia or industry research.
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