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seminars:seminar_03_28_14 [2014/03/13 18:06]
seminars:seminar_03_28_14 [2017/09/20 22:02] (current)
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 +====== Improving Cache Performance by Exploiting Read-Write Disparity ======
 +==== Samira Khan ====
 +== Tuesday, Mar. 18th, 4:​00pm-5:​00pm ==
 +== Hamerschlag Hall D-210 ==
 +Cache read misses stall the processor if
 +there are no independent instructions to execute. In contrast, most cache write misses are
 +off the critical path of execution, since writes
 +can be buffered in the cache or the store buffer. With few exceptions, cache lines that serve
 +loads are more critical for performance than
 +cache lines that serve only stores. Unfortunately,​ traditional cache management mecha-
 +nisms do not take into account this disparity
 +between read-write criticality. The key contribution of this work is the new idea of distin-
 +guishing between lines that are reused by
 +reads versus those that are reused only by
 +writes to focus cache management policies on
 +the more critical read lines. We propose a
 +Read-Write Partitioning (RWP) policy that minimizes read misses by dynamically partitioning
 +the cache into clean and dirty partitions, where
 +partitions grow in size if they are more likely to
 +receive future read requests. We show that
 +exploiting the differences in read-write criticality provides better performance over prior
 +cache management mechanisms.
 +Samira Khan is a Post Doctoral Researcher at CMU working with Profes-
 +sor Onur Multu, She is also associated
 +with Intel Labs, Hillsboro. Her research
 +focuses on improving the performance,​
 +efficiency, and reliability of memory hierarchy of modern processors. She re-
 +ceived her PhD from the Department of Computer Science in the University of
 +Texas at San Antonio.