- When? December 4, 2010 (full-day tutorial)
- Who? Academic/industrial researchers interested in full-system performance evaluation using desktop and commercial applications
- Keywords: full-system simulation, multi-core and multiprocessor simulation, sampling, commercial workloads, measurement methodology
|8:30 - 10:00||SimFlex Part I||Applying the SMARTS statistical sampling methodology to measure processor performance with multi-threaded server workloads.||Pejman Lotfi-Kamran|
|10:00 - 10:30||Coffee Break||-||-|
|10:30 - 11:00||SimFlex Part II||Flexus simulator internals and tools.||Mike Ferdman|
|11:00 - 12:00||Flexus hands-on tutorial||The complete process of going from workload sources, to checkpoint library, and then to performance results.||-|
|12:00 - 1:30||Lunch||-||-|
|1:30 - 3:00||ProtoFlex Concepts||The design of ProtoFlex and its accompanying tools.||Eric Chung, Michael Papamichael|
|3:00 - 3:30||Coffee Break||-||-|
|3:30 - 5:00||ProtoFlex hands-on tutorial||Performing instrumentation and measurement with ProtoFlex.||-|
Computer architects have long relied on software simulation to evaluate the functionality and performance of architectural innovations. Unfortunately, modern cycle-accurate simulators are several orders of magnitude slower than real hardware and the growing levels of hardware integration increase simulation complexity even further. In addition, conventional simulators are optimized for speed at the expense of code flexibility and maintainability. In this tutorial, we present the SMARTS simulation sampling and a hands-on introduction to the SimFlex and ProtoFlex family of simulation tools for fast, accurate, and flexible simulation of uniprocessor, multi-core, and distributed shared-memory systems.
SimFlex achieves fast simulation turnaround while ensuring representative results by leveraging the SMARTS simulation sampling framework. At the same time, its component-based design allows for easy composition of complex multi-core and multiprocessor systems. ProtoFlex is an FPGA-accelerated simulation technology that complements SimFlex by enabling full-system functional simulation of multiprocessor and multi-core systems at speeds of one to two orders of magnitude faster than software tools.
In this tutorial, we first introduce attendees to the SMARTS simulation sampling approach. We present relevant background and explain how the SMARTS approach is extended to enable fast and statistically rigorous evaluation of systems executing server workloads. Second, we present the design, implementation, and use of Flexus, the SimFlex component-based C++ simulator suite. Finally, we present ProtoFlex and FACS (FPGA-Accelerated Cache Simulator), which are used to accelerate instrumented functional simulation using FPGAs.
- Mike Ferdman (CMU/EPFL) is a PhD candidate in the Computer Architecture Laboratory at Carnegie Mellon, where he is advised by Prof. Babak Falsafi. Mike's research targets understanding memory system behaviors of modern software and leveraging these behaviors to improve power efficiency and performance of future processor architectures.
- Pejman Lotfi-Kamran is a third-year PhD candidate in the Parallel Systems Architecture Laboratory at EPFL, where he is advised by Prof. Babak Falsafi. Pejman’s research interests include various aspects of computer architecture, including multi-core architectures, power-efficient architectures, and interconnection networks.
- Michael K. Papamichael (CMU) is a fourth-year Ph.D. student in the Computer Science Department at Carnegie Mellon University, working with Prof. James C. Hoe. His research interests are in the area of computer architecture, with emphasis on FPGA-accelerated simulation and instrumentation for multiprocessor architectures.
This tutorial will be emphasizing hands-on activity with tools from both SimFlex and ProtoFlex. Attendees will be required to bring a laptop computer to access remote workstations at CMU.