Tuesday November 1st, 2016
Location: Panther Hollow Conference Room, CIC - 4th Floor
Energy efficiency is now a principal design constraint across all computing markets - from supercomputers to smartphones. A very effective approach to improving microprocessor energy efficiency is to reduce (or eliminate) design margins that target worst-case operating conditions.
In the first part of this talk I will present two approaches for significantly reducing supply voltage margins in GPUs by addressing reliability issues. I will show that by jointly mitigating voltage noise and process variation we can achieve large supply voltage reductions with very small performance impact, resulting in substantial energy gains.
In the second part of this talk I will discuss security applications of low-margin computing. In particular, I will present a novel, low-cost design for physical unclonable functions that can be used in system authentication. Our solution leverages intrinsic chip properties in low voltage environments and does not require dedicated hardware support. Instead, it uses on-chip error correction logic already built into many processor caches. We demonstrate the authentication system with a hardware prototype.
Radu Teodorescu in an Associate Professor at The Ohio State University where he leads the Architecture Research Lab. His research interests include energy-efficient computing, reliability, variability and security. He was the recipient of OSU’s Lumley Award in 2014, an NSF CAREER award in 2012 and the W. J. Poppelbaum Award from University of Illinois in 2008.