Benjamin A. Levine, Ph.D.
	CONTACT INFORMATION   E-Mail: benjamin.levine@alumni.cmu.edu

 UPDATE

I am now working for Rapport, Inc, in Redwood City, CA. Rapport has licensed PipeRench from CMU and is commercializing it as Kilocore.

Bio

I received my B.S. and M.S. in Electrical Engineering from the University of Tennessee, Knoxville, in 1997 and 1999, respectively. My research advisor at UT was Don Bouldin. At UT, I worked on the CHAMPION project, a system for mapping image processing applications to reconfigurable hardware. In May of 2005, I completed my PhD in the Department of Electrical and Computer Engineering at Carnegie Mellon University in Pittsburgh, Pennsylvania. My advisor at CMU was Herman Schmit. My Ph.D. research involved the development of HASTE: Hybrid Architectures with a Single, Transformable Executable. These architectures have both a conventional processor and a fabric of programmable functional units and interconnect. A sequential stream of instructions for the processor can be transformed, at run-time, into a spatial configuration for the fabric, enabling the use of one executable for the entire architecture, thus providing the benefits of high performance custom datapaths within the context of a single, cohesive programming model. Previously at CMU I helped design, verify, and test the 3.7 million transistor prototype of PipeRench reconfigurable computing architecture. My Ph.D. research was funded by a fellowship from the Semiconductor Research Corporation and IBM. Other work at CMU involved the implementation of diverse applications on reconfigurable hardware, especially the PipeRench architecture. Specific projects included implementation of near Shannon limit error correction codes and Automatic Target Recognition (ATR) algorithms on PipeRench and Xilinx based hardware. The ATR work was done with support from DARPA and in conjunction with researchers from Northrop Grumman Electronic Systems.