with Josie
Brian Gold
Founding Engineer
Stealth-mode Startup
email: brian.t.gold at gmail.com
 
Research and Affiliation
I've graduated. I'm a Founding Engineer at a stealth-mode startup in the SF Bay Area. Previously, I was with Oracle Labs and, before that, part of Sun Labs. My LinkedIn profile has more details.

I was a graduate student in the Computer Architecture Lab at Carnegie Mellon (CALCM), where I worked on the TRUSS project. The goal of TRUSS is a reliable, scalable, and cost-efficient multiprocessor. See publications below for further details.

My advisor was Babak Falsafi, and I also worked closely with Professors James Hoe, Ken Mai, Anastassia Ailamaki, and their many students.

Education
Ph.D. in Computer Engineering
Thesis: Increasing Processor Dependability in Distributed Shared-Memory Servers
August 2003 - May 2009, Carnegie Mellon University
MS Computer Engineering
Thesis: Balancing Performance, Area, and Power in an On-Chip Network
August 2003, Virginia Tech
BS Electrical Engineering and BS Applied Math
May 2001, Virginia Tech
Software and Related Materials
SimFlex: Fast, Accurate and Flexible Computer Architecture Simulation
I have spent much of my graduate career working with and extending Flexus, our full-system, timing-accurate architecture simulator. Flexus connects to Virtutech Simics, enabling detailed modeling of unmodified SPARC and x86 binaries, including operating systems. We have built a number of processor and memory system models for Flexus, including support for out-of-order and multithreaded execution, chip multiprocessor and directory-based shared memory systems, and detailed interconnects.

Teaching cache coherence protocols with model checking, a lab assignment
Designing a cache coherence protocol is challenging. Teaching students about common design mistakes and how to avoid them is even more difficult, especially when confined to traditional lecture materials. We think we have a better way: model checking. This lab (from 18-742, Multiprocessor Architecture) has students develop their own cache coherence protocol using a model checker (Murphi).
Honors and Awards
Publications
Recent

PowerNap: Eliminating Server Idle Power
David Meisner, Brian T. Gold, and Thomas F. Wenisch
Int'l Conf. on Architectural Support for Programming Languages and
Operating Systems (ASPLOS '09), March 2009.

Redac: Distributed, Asynchronous Redundancy in Shared-Memory Servers
Brian T. Gold, Babak Falsafi, James C. Hoe, and Ken Mai
Computer Architecture Lab at Carnegie Mellon (CALCM) Technical Report 2008-002.

Mitigating Multi-bit Soft Errors in L1 Caches Using Last Store Prediction
Brian T. Gold, Michael Ferdman, Babak Falsafi, and Ken Mai
Workshop on Architectural Support for Gigascale Integration (ASGI-07), June 2007.

Detecting Emerging Wearout Faults
Jared C. Smolens, Brian T. Gold, James C. Hoe, Babak Falsafi, and Ken Mai
Workshop on Silicon Errors in Logic - System Effects (SELSE-3), April 2007.

Reunion: Complexity-Effective Multicore Redundancy
Jared C. Smolens, Brian T. Gold, Babak Falsafi, and James C. Hoe
Int'l Symp. on Microarchitecture (MICRO-39), December 2006.

The Granularity of Soft-Error Containment in Shared-Memory Multiprocessors
Brian T. Gold, Jared C. Smolens, Babak Falsafi, and James C. Hoe
Workshop on System Effects of Logic Soft Errors (SELSE-2), April 2006.

TRUSS: A Reliable, Scalable Server Architecture
Brian T. Gold, Jangwoo Kim, Jared C. Smolens, Eric S. Chung, Vasileios Liaskovitis, Eriko Nurvitadhi, Babak Falsafi, James C. Hoe, and Andreas G. Nowatzyk
IEEE Micro Special Issue on Reliability-Aware Microarchitectures, November-December 2005.

Accelerating Database Operators Using a Network Processor
Brian T. Gold, Anastassia Ailamaki, Larry Huston, and Babak Falsafi
Int'l Workshop on Data Management on New Hardware (DaMoN), June 2005.

Fingerprinting: Bounding Soft-Error Detection Latency and Bandwidth
Jared C. Smolens, Brian T. Gold, Jangwoo Kim, Babak Falsafi, James C. Hoe, and Andreas G. Nowatzyk
Int'l Conf. on Architectural Support for Programming Languages and
Operating Systems (ASPLOS XI), October 2004.
Also in IEEE Micro's Top Picks from Microarchitecture Conferences, November-December 2004 (pdf).

Masters Work @ Virginia Tech

SCMP: A Single-Chip Message-Passing Parallel Computer
James M. Baker, Jr, Brian T. Gold, Mark Bucciero, Sidney Bennett,
Rajneesh Mahajan, Priyadarshini Ramachandran, and Jignesh Shah
Journal of Supercomputing, 30(2): pp. 133-149, November 2004.

Balancing Performance, Area, and Power in an On-Chip Network
Brian T. Gold
Masters Thesis, Virginia Tech, August 2004.

SCMP: A Single-Chip Message-Passing Parallel Computer
James M. Baker, Jr., Sidney Bennett, Mark Bucciero, Brian T. Gold, and Rajneesh Mahajan
Parallel and Distributed Processing Techniques and Applications (PDPTA), June 2002.

Other/Older

Some RF Broadband Scatter from the Trihedral Corner Reflector
E. Mokole, D. Taylor, B.T. Gold, and T. Sarkar
in Ultra-Wideband, Short-Pulse Electromagnetics 7, ed. by F. Sabath, E.L. Mokole, U. Schenk, D. Nitsch
Springer Verlag, NY, 2007, pp. 604-612.

Analytical, Numerical, and Experimental Results for Wide-Angle Biconical Antennas
E. Mokole, S. Samaddar, G. Sorenson, M. Kragalott, B.T. Gold, and M. Parent
Ultra-Wideband, Short-Pulse Electromagnetics 6, ed. by E. Mokole, M. Kragalott, and K. Gerlach
Kluwer Academic / Plenum Publishers, NY, 2003, pp. 345-356.

Preliminary Calculated Scatter from Trihedral Corner Reflector with WIPL-D
E.L. Mokole, B.T. Gold, and T.K. Sarkar
20th Annual Review of Progress in Applied Computational Electromagnetics
April 19-23, Syracuse NY (2004).

Initial Bistatic Measurements of Electromagnetic Propagation in an Enclosed Ship Environment
E. L. Mokole, M. Parent, J. Valenzi, E. Tomas, B. T. Gold, T. T. Street, and S. N. Samaddar
Proceedings of the 1999 Antenna Applications Symposium, September 1999.

Real-time Adaptive Control using Neural Generalized Predictive Control
Pamela J. Haley, Donald Soloway, and Brian T. Gold
Proceedings of the 1999 American Control Conference, June 1999.

Preliminary Report on Electromagnetic Propagation in an Enclosed Ship Environment
E.L. Mokole, M. Parent, S.N. Samaddar, E. Tomas, B.T. Gold, T.T. Street, and J. Valenzi
Memo-Letter Report 5340/193, 30 October 1998.

Courses and Teaching
15-857A, Performance Modeling and Design of Computer Systems
15-858A, Advanced Stochastic Analysis and Applications
36-625, Probability and Mathematical Statistics I
36-626, Probability and Mathematical Statistics II
18-742, Multiprocessor Architecture, Spring 2005 (TA)
18-742, Multiprocessor Architecture, Spring 2004 (TA)
15-721, Database Management Systems, Spring 2004
18-741, Advanced Computer Architecture, Fall 2003
18-760, VLSI Logic to Layout, Fall 2003