I am the Microarchitecture thrust leader of the Center for Circuit and System Solutions and affiliated with the Center for Silicon Systems Implementation. I am also a co-founder of, and affiliated with, the Computer Architecture Lab at Carnegie Mellon.

My research interests are primarily centered around computer architecture with emphasis on high-performance memory systems, architectural support for gigascale integration, and analytic and simulation tools for design evaluation.

I am co-chairing the third Workshop on Transactional Computing TRANSACT which will be held in conjunction with PPoPP in Salt Lake City in February 2008. I am also co-general chair for the fourth Workshop on Silicon Errors in Logic-System Effects SELSE which will be held in Austin in April 2008.