Carnegie Mellon's Reconfigurable Computer Project addresses the
two most significant problems with current reconfigurable computing
- traditional FPGAs have hard resource constraints, which makes
it difficult for a compilation tool to consistently and easily
generate applications, and
- there is no mechanism to provide forward-compatibility, causing
the investment in generating applications to be lost for future
generations of silicon.
This project addresses these limitations by virtualizing hardware, which allows a hardware design of any size to execute on a compatible
device with any capacity. Hardware virtualization is accomplished
through extremely high-speed reconfiguration. We are developing
an architecture, called PipeRench, that provides the high-speed reconfiguration necessary for hardware
virtualization, compilation tools for this architecture, and applications
that will demonstrate
The PipeRench chip is out and
has passed all the tests.
All our DIL programs go
through the entire tool-chain
and execute correctly!
We are expecting the PCI