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====== ProtoFlex ====== | ====== ProtoFlex ====== | ||
- | ProtoFlex is an FPGA-accelerated hybrid functional simulatordesigned to advance large-scale multiprocessor hardware and software research. ProtoFlex provides first-class support for full-system fidelity–i.e., the ability to run stock commercial operating systems with I/O support. This is accomplished without undue effort by leveraging a hybrid emulation technique called transplanting. Our transplant technology uses FPGAs to dynamically accelerate only common-case behaviors while relegating infrequent, complex behaviors (e.g., I/O devices) to software simulation. By working in concert with existing full-system simulators, transplanting avoids the costly and unnecessary construction of the entire target system in FPGA. At present, we are targeting SPARCV9 and x86 platforms. | + | ProtoFlex is an FPGA-accelerated hybrid functional simulator designed to advance large-scale multiprocessor hardware and software research. ProtoFlex provides first-class support for full-system fidelity–i.e., the ability to run stock commercial operating systems with I/O support. This is accomplished without undue effort by leveraging a hybrid emulation technique called transplanting. Our transplant technology uses FPGAs to dynamically accelerate only common-case behaviors while relegating infrequent, complex behaviors (e.g., I/O devices) to software simulation. By working in concert with existing full-system simulators, transplanting avoids the costly and unnecessary construction of the entire target system in FPGA. At present, we are targeting SPARCV9 and x86 platforms. |
{{:pflex-tplant.jpg|Protoflex Transplanting}} | {{:pflex-tplant.jpg|Protoflex Transplanting}} | ||
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**Faculty:** [[http://www.ece.cmu.edu/~jhoe|James C. Hoe]], [[http://www.ece.cmu.edu/~babak|Babak Falsafi]], [[http://www.ece.cmu.edu/directory/details/298/|Ken Mai]]\\ | **Faculty:** [[http://www.ece.cmu.edu/~jhoe|James C. Hoe]], [[http://www.ece.cmu.edu/~babak|Babak Falsafi]], [[http://www.ece.cmu.edu/directory/details/298/|Ken Mai]]\\ | ||
- | **Faculty:** [[http://www.ece.cmu.edu/~echung|Eric S. Chung]], [[http://www.cs.cmu.edu/~mpapamic|Michael K. Papamichael]], [[http://www.ece.cmu.edu/~bgold|Brian Gold]], [[http://www.ece.cmu.edu/~enurvita|Eriko Nurvitadhi]]\\ | + | **Students:** [[http://www.ece.cmu.edu/~echung|Eric S. Chung]], [[http://www.cs.cmu.edu/~mpapamic|Michael K. Papamichael]], [[http://www.ece.cmu.edu/~bgold|Brian Gold]], [[http://www.ece.cmu.edu/~enurvita|Eriko Nurvitadhi]]\\ |
**Related links:** [[http://www.ece.cmu.edu/~simflex|SimFlex]], [[http://www.virtutech.com/|Virtutech Simics]], [[http://ramp.eecs.berkeley.edu/|RAMP]], [[http://bee2.eecs.berkeley.edu/|BEE2]]\\ | **Related links:** [[http://www.ece.cmu.edu/~simflex|SimFlex]], [[http://www.virtutech.com/|Virtutech Simics]], [[http://ramp.eecs.berkeley.edu/|RAMP]], [[http://bee2.eecs.berkeley.edu/|BEE2]]\\ | ||
---- | ---- | ||
\\ | \\ | ||
+ | ===== Instructions for obtaining the source code ===== | ||
+ | To get a copy of the source code and view instructions on how to use Protoflex, please visit the **[[documentation:userguide|User Guide]]**. | ||
+ | \\ | ||
+ | \\ | ||
+ | |||
===== Publications ===== | ===== Publications ===== | ||
- | **ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs**\\ | + | **{{:a15-chung.pdf|ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs}}**\\ |
Eric S. Chung, Michael K. Papamichael, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, and Ken Mai.\\ | Eric S. Chung, Michael K. Papamichael, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, and Ken Mai.\\ | ||
- | //ACM Transactions on Reconfigurable Technology and Systems//, 2009, to appear.\\ | + | //ACM Transactions on Reconfigurable Technology and Systems//, 2009.\\ |
\\ | \\ | ||
- | **{{http://www.ece.cmu.edu/~simflex/protoflex_content.html|A Complexity-Effective Architecture for Accelerating Full-System Multiprocessor Simulations Using FPGAs}}**\\ | + | **{{:fpga08-chung.pdf|A Complexity-Effective Architecture for Accelerating Full-System Multiprocessor Simulations Using FPGAs}}**\\ |
Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, and Ken Mai.\\ | Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, and Ken Mai.\\ | ||
//International Symposium on Field Programmable Gate Arrays//, February 2008, Monterey, CA.\\ | //International Symposium on Field Programmable Gate Arrays//, February 2008, Monterey, CA.\\ | ||
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In the //First Workshop on Architecture Research using FPGA Platforms (WARFP 2005)//, February 2005\\ | In the //First Workshop on Architecture Research using FPGA Platforms (WARFP 2005)//, February 2005\\ | ||
\\ | \\ | ||
+ | |||
===== Recent Talks ===== | ===== Recent Talks ===== | ||
**{{:ramp_retreat_aug_2008.pdf|Protoflex: FPGA-Accelerated Instrumentation}}**\\ | **{{:ramp_retreat_aug_2008.pdf|Protoflex: FPGA-Accelerated Instrumentation}}**\\ | ||
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Eriko Nurvitadhi, James C. Hoe, Babak Falsafi\\ | Eriko Nurvitadhi, James C. Hoe, Babak Falsafi\\ | ||
Given at the //RAMP Summer Retreat//, June 2006\\ | Given at the //RAMP Summer Retreat//, June 2006\\ | ||
+ | \\ | ||
+ | ===== Recent Posters ===== | ||
+ | **{{:RAMP_Retreat_Jan_2010_poster.pdf|The Open-Source ProtoFlex Simulator}}**\\ | ||
+ | Eric S. Chung, Michael K. Papamichael, James C. Hoe, Ken Mai, Babak Falsafi.\\ | ||
+ | Presented at the //RAMP Winter Retreat//, January 2010\\ | ||
+ | \\ | ||
+ | **{{:ASPLOS_2008_poster.pdf|An MP Architectural Exploration Vehicle Using Complexity-Effective FPGA-Accelerated Simulation}}**\\ | ||
+ | Eric S. Chung, Michael K. Papamichael, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai.\\ | ||
+ | Presented at //ASPLOS 2008//, March 2008\\ | ||
+ | \\ | ||
+ | **{{:RAMP_Retreat_Aug_2008_poster.pdf|Protoflex: Complexity-Effective FPGA-Accelerated Instrumentation}}**\\ | ||
+ | Michael K. Papamichael, Eric S. Chung, James C. Hoe, Babak Falsafi, Ken Mai.\\ | ||
+ | Presented at the //RAMP Summer Retreat//, August 2008\\ | ||
+ | \\ | ||
+ | \\ | ||
+ | ---- | ||
- | + | This research is currently supported in funding and/or equipment by **NSF** (Award--0811702), **FCRP**/**C2S2**, **SUN**, and **Xilinx**. | |
- | + |