Parameterizable on-chip network infrastructure

Spring 2011

Student
Archa Jain
Advisor
Diana Marculescu
Project description

This project aims at developing a plug-and-play on-chip communication infrastructure for prototyping multi-core systems. The project involves developing Matlab descriptions for single- and multi-core architectures, using a network-on-chip communication infrastructure. The final Verilog implementation is obtained through the use of HDLCoder and can be used to map either synthetic or real communicating applications.

Return to project list