Parameterizable on-chip network infrastructure

Fall 2010

Student
Archa Jain
Advisor
Diana Marculescu
Project description

This project aims at developing a plug-and-play on-chip communication infrastructure for prototyping multi-core systems. The project includes developing Verilog descriptions for on-chip routers according to a given specified input/output interface, along with an automatic generator for parameterizable on-chip networks that can be used in conjunction with a variety of computing cores or other types of resources.

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