LDO Testing and Verification

Spring 2014

Student
Andrew Mort
Advisor
Ken Mai
Project description

This research project is intended to be a continuation of the 18525 capstone. In the first semester we designed and completed the layout of an LDO. In this second semester, we will continue testing the schematics, send and receive the chip from fabrication, and design the PCB for the physical chip testing. This will complete our introduction to the IC design and manufacture process.

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