SIFT Vector-Matching Algorithm Hardware Application for CoRAM FPGA Architecture

Fall 2011

Student
Taylor Womack
Advisor
James Hoe
Project description

Connected RAM (CoRAM) [1] is an FPGA memory architecture developed as a way of simplifying the design process for FPGA hardware applications in order to make FPGAs a more feasible processing platform. The key takeaways of the CoRAM architecture are its memory scalability and its portability amongst FPGA platforms. As a proof of concept for this architecture, I will be designing a hardware implementation of the Scaled Invariant Feature Transformation (SIFT) algorithm [2], a feature detection computer vision algorithm that identifies objects by comparing the feature vectors (or keys) of a given database object to feature vectors found in an image. More specifically, I will be implementing the feature matching portion of the SIFT algorithm where keys from an image are compared to the SIFT database keys.

Objectives: (1) A working hardware application designed for the CoRAM FPGA architecture to serve as a proof of concept. This application will be carried out to completion with a hard implementation on an FPGA. (2) A study of the SIFT algorithm and how its performance can be improved in hardware, which lends itself to parallelism and other efficiencies. This parallelism comes from the fact that keys from an image can be pipelined to be compared with multiple SIFT keys simultaneously.

Methods To Be Used: (1) Read literature on SIFT vector-matching algorithm. (2) Develop an application that nearly replicates the algorithm. (3) Ensure feasibility through both simulation and hardware testing. (4) Make optimizations in the application for the hardware and test in hardware (5) Compare the performance of the hardware application with that of the software application.

Expected Outcomes: (1) Working hardware application. (2) SIFT vector-matching algorithm performance is greatly increased in hardware over software.

References: [1] CoRAM: An In-Fabric Memory Architecture for FPGA-based Computing. E. S. Chung, J. C. Hoe and K. Mai. ACM International Symposium on Field-Programmable Gate Arrays, February 2011. [2] Object Recognition from Local Scale-Invariant Features. Lowe, David G. Proceedings of the International Conference on Computer Vision, 1999.

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