ECE faculty and student win IEEE Donald O. Pederson Best Paper Award

 

April 6, 2016

ECE Associate Professor Xin Li, ECE alumnus Dr. Shupeng Sun and their collaborators have won the IEEE Donald O. Pederson Best Paper Award for the paper, “Fast Statistical Analysis of Rare Circuit Failure Events via Scaled-Sigma Sampling for High-Dimensional Variation Space.” The award, sponsored by the IEEE Council on Electronic Design Automation, recognizes the best paper published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems over the past two years. The winner is selected by a dedicated committee based on general quality, originality, contributions, subject matter and timeliness.

The paper was part of Dr. Shupeng Sun’s Ph.D. work, advised by Professor Xin Li. Collaborators included Hongzhou Liu, Kangsheng Luo, and Ben Gu from Cadence Design Systems. Their paper describes a radically new algorithm to calculate the rare failure rate with consideration of variability and uncertainties in manufacturing process, allowing companies to validate their integrated circuits with significantly less simulation time. The proposed algorithm has been integrated into two commercial tools, Virtuoso ADE and MMSIM Spectre, by Cadence.

The authors will accept the award, which includes a plaque and cash prize, in June at the IEEE/ACM Design Automation Conference in Austin, Texas.

Abstract
Accurately estimating the rare failure rates for nanoscale circuit blocks (e.g., static random-access memory, D flip-flop, etc.) is a challenging task, especially when the variation space is high-dimensional. In this paper, we propose a novel scaled-sigma sampling (SSS) method to address this technical challenge. The key idea of SSS is to generate random samples from a distorted distribution for which the standard deviation (i.e., sigma) is scaled up. Next, the failure rate is accurately estimated from these scaled random samples by using an analytical model derived from the theorem of “soft maximum.” Our proposed SSS method can simultaneously estimate the rare failure rates for multiple performances and/or specifications with only a single set of transistor-level simulations. To quantitatively assess the accuracy of SSS, we estimate the confidence interval of SSS based on bootstrap. Several circuit examples designed in nanoscale technologies demonstrate that the proposed SSS method achieves significantly better accuracy than the traditional importance sampling technique when the dimensionality of the variation space is more than a few hundred.

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Xin Li