Yue's Paper Among Most Cited in the *JSSC*

 

March 22, 2006

A paper authored by ECE assistant professor Patrick Yue is now among the top cited papers that have appeared in the IEEE Journal of Solid-State Circuits, the leading journal in the field of integrated circuit design. Only 39 articles published since the inception of the Journal in 1966 have been cited more than 100 times according to Thomson ISI.

The paper titled "On-Chip Spiral Inductors with Patterned Ground Shields for Si-Based RF IC's," was published in the May 1998 issue of the JSSC. The significance of the paper is attributed to its introducing a fundamental design technique, the patterned ground shield (PGS), to improve the performance of integrated inductors.

Like resistors and capacitors, inductors are basic elements in electronic design and are used extensively in radio frequency (RF) circuits. The proliferation of wireless communications has created a huge demand for highly integrated radio systems and thus stimulated significant interest in realizing inductors on chip for lower power and reduced system cost. However, the integration of inductors on chip has been hampered by the detrimental effects caused by the underlying lossy silicon substrate. Yue's paper describes that by inserting a PGS between a spiral inductor and the silicon substrate, the substrate effects can be effectively eliminated.

Yue received his Ph.D. from Stanford University in 1998. Before joining our faculty in 2003, he was a consulting assistant professor of ECE at Stanford and a founding member of Atheros Communications.

Patrick Yue’s paper that introduces the patterned ground shield to improve the performance of integrated inductors is among the top cited papers that have appeared in the *JSSC* since 1966.